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From: "Jan Beulich" <JBeulich@suse.com>
To: xen-devel <xen-devel@lists.xenproject.org>
Cc: George Dunlap <George.Dunlap@eu.citrix.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Wei Liu <wei.liu2@citrix.com>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: [PATCH 8/9] x86/CPUID: drop INVPCID dependency on PCID
Date: Thu, 02 May 2019 06:22:22 -0600	[thread overview]
Message-ID: <5CCAE0FE020000780022B313@prv1-mh.provo.novell.com> (raw)
In-Reply-To: <5CCAD5ED020000780022B2A2@prv1-mh.provo.novell.com>

PCID validly depends on LM, as it can be enabled in Long Mode only.
INVPCID, otoh, can be used not only without PCID enabled, but also
outside of Long Mode altogether. In both cases its functionality is
simply restricted to PCID 0, which is sort of expected as no other PCID
can be activated there.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -217,10 +217,6 @@ def crunch_numbers(state):
         #
         # SSE4_2: [POPCNT]
 
-        # The INVPCID instruction depends on PCID infrastructure being
-        # available.
-        PCID: [INVPCID],
-
         # XSAVE is an extra set of instructions for state management, but
         # doesn't constitue new state itself.  Some of the dependent features
         # are instructions built on top of base XSAVE, while others are new



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Xen-devel@lists.xenproject.org
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WARNING: multiple messages have this Message-ID (diff)
From: "Jan Beulich" <JBeulich@suse.com>
To: "xen-devel" <xen-devel@lists.xenproject.org>
Cc: George Dunlap <George.Dunlap@eu.citrix.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Wei Liu <wei.liu2@citrix.com>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: [Xen-devel] [PATCH 8/9] x86/CPUID: drop INVPCID dependency on PCID
Date: Thu, 02 May 2019 06:22:22 -0600	[thread overview]
Message-ID: <5CCAE0FE020000780022B313@prv1-mh.provo.novell.com> (raw)
Message-ID: <20190502122222.DchTr8XdAFsUxT4_HDAFv8eZPGbIo8LZaYcL2P8yABg@z> (raw)
In-Reply-To: <5CCAD5ED020000780022B2A2@prv1-mh.provo.novell.com>

PCID validly depends on LM, as it can be enabled in Long Mode only.
INVPCID, otoh, can be used not only without PCID enabled, but also
outside of Long Mode altogether. In both cases its functionality is
simply restricted to PCID 0, which is sort of expected as no other PCID
can be activated there.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -217,10 +217,6 @@ def crunch_numbers(state):
         #
         # SSE4_2: [POPCNT]
 
-        # The INVPCID instruction depends on PCID infrastructure being
-        # available.
-        PCID: [INVPCID],
-
         # XSAVE is an extra set of instructions for state management, but
         # doesn't constitue new state itself.  Some of the dependent features
         # are instructions built on top of base XSAVE, while others are new



_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

  parent reply	other threads:[~2019-05-02 12:22 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-02 11:35 [PATCH 0/9] XSA-292 follow-up Jan Beulich
2019-05-02 11:35 ` [Xen-devel] " Jan Beulich
2019-05-02 12:18 ` [PATCH 1/9] x86: adjust cr3_pcid() return type Jan Beulich
2019-05-02 12:18   ` [Xen-devel] " Jan Beulich
2019-05-02 12:19 ` [PATCH 2/9] x86: limit the amount of TLB flushing in switch_cr3_cr4() Jan Beulich
2019-05-02 12:19   ` [Xen-devel] " Jan Beulich
2019-05-02 12:19 ` [PATCH 3/9] x86/mm: honor opt_pcid also for 32-bit PV domains Jan Beulich
2019-05-02 12:19   ` [Xen-devel] " Jan Beulich
2019-05-02 12:20 ` [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3() Jan Beulich
2019-05-02 12:20   ` [Xen-devel] " Jan Beulich
2019-05-02 13:07   ` Paul Durrant
2019-05-02 13:07     ` [Xen-devel] " Paul Durrant
2019-05-02 13:23     ` Jan Beulich
2019-05-02 13:23       ` [Xen-devel] " Jan Beulich
2019-05-02 13:25       ` Paul Durrant
2019-05-02 13:25         ` [Xen-devel] " Paul Durrant
2019-05-02 12:20 ` [PATCH 5/9] x86/HVM: refuse CR3 loads with reserved (upper) bits set Jan Beulich
2019-05-02 12:20   ` [Xen-devel] " Jan Beulich
2019-05-02 12:21 ` [PATCH 6/9] x86/HVM: relax shadow mode check in hvm_set_cr3() Jan Beulich
2019-05-02 12:21   ` [Xen-devel] " Jan Beulich
2019-05-02 12:21 ` [PATCH 7/9] x86/HVM: cosmetics to hvm_set_cr3() Jan Beulich
2019-05-02 12:21   ` [Xen-devel] " Jan Beulich
2019-05-02 12:22 ` Jan Beulich [this message]
2019-05-02 12:22   ` [Xen-devel] [PATCH 8/9] x86/CPUID: drop INVPCID dependency on PCID Jan Beulich
2019-05-02 12:22 ` [PATCH 9/9] x86: PCID is unused when !PV Jan Beulich
2019-05-02 12:22   ` [Xen-devel] " Jan Beulich

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