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From: Robin Murphy <robin.murphy@arm.com>
To: will@kernel.org
Cc: iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/4] iommu/io-pgtable-arm: Prepare for TTBR1 usage
Date: Mon, 19 Aug 2019 19:19:31 +0100	[thread overview]
Message-ID: <6596469d5fa1e918145fdd4e6b1a3ad67f7cde2e.1566238530.git.robin.murphy@arm.com> (raw)
In-Reply-To: <cover.1566238530.git.robin.murphy@arm.com>

Now that callers are free to use a given table for TTBR1 if they wish
(all they need do is shift the provided attributes when constructing
their final TCR value), the only remaining impediment is the address
validation on map/unmap. The fact that the LPAE address space split is
symmetric makes this easy to accommodate - by simplifying the current
range checks into explicit tests that address bits above IAS are all
zero, it then follows straightforwardly to add the inverse test to
allow the all-ones case as well.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
 drivers/iommu/io-pgtable-arm.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index 09cb20671fbb..f39c50356351 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -475,13 +475,13 @@ static int arm_lpae_map(struct io_pgtable_ops *ops, unsigned long iova,
 	arm_lpae_iopte *ptep = data->pgd;
 	int ret, lvl = ARM_LPAE_START_LVL(data);
 	arm_lpae_iopte prot;
+	long iaext = (long)iova >> data->iop.cfg.ias;
 
 	/* If no access, then nothing to do */
 	if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE)))
 		return 0;
 
-	if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias) ||
-		    paddr >= (1ULL << data->iop.cfg.oas)))
+	if (WARN_ON((iaext && ~iaext) || paddr >> data->iop.cfg.oas))
 		return -ERANGE;
 
 	prot = arm_lpae_prot_to_pte(data, iommu_prot);
@@ -647,8 +647,9 @@ static size_t arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,
 	struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops);
 	arm_lpae_iopte *ptep = data->pgd;
 	int lvl = ARM_LPAE_START_LVL(data);
+	long iaext = (long)iova >> data->iop.cfg.ias;
 
-	if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias)))
+	if (WARN_ON(iaext && ~iaext))
 		return 0;
 
 	return __arm_lpae_unmap(data, iova, size, lvl, ptep);
-- 
2.21.0.dirty

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: will@kernel.org
Cc: robdclark@gmail.com, joro@8bytes.org, jcrouse@codeaurora.org,
	iommu@lists.linux-foundation.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/4] iommu/io-pgtable-arm: Prepare for TTBR1 usage
Date: Mon, 19 Aug 2019 19:19:31 +0100	[thread overview]
Message-ID: <6596469d5fa1e918145fdd4e6b1a3ad67f7cde2e.1566238530.git.robin.murphy@arm.com> (raw)
In-Reply-To: <cover.1566238530.git.robin.murphy@arm.com>

Now that callers are free to use a given table for TTBR1 if they wish
(all they need do is shift the provided attributes when constructing
their final TCR value), the only remaining impediment is the address
validation on map/unmap. The fact that the LPAE address space split is
symmetric makes this easy to accommodate - by simplifying the current
range checks into explicit tests that address bits above IAS are all
zero, it then follows straightforwardly to add the inverse test to
allow the all-ones case as well.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
 drivers/iommu/io-pgtable-arm.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index 09cb20671fbb..f39c50356351 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -475,13 +475,13 @@ static int arm_lpae_map(struct io_pgtable_ops *ops, unsigned long iova,
 	arm_lpae_iopte *ptep = data->pgd;
 	int ret, lvl = ARM_LPAE_START_LVL(data);
 	arm_lpae_iopte prot;
+	long iaext = (long)iova >> data->iop.cfg.ias;
 
 	/* If no access, then nothing to do */
 	if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE)))
 		return 0;
 
-	if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias) ||
-		    paddr >= (1ULL << data->iop.cfg.oas)))
+	if (WARN_ON((iaext && ~iaext) || paddr >> data->iop.cfg.oas))
 		return -ERANGE;
 
 	prot = arm_lpae_prot_to_pte(data, iommu_prot);
@@ -647,8 +647,9 @@ static size_t arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,
 	struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops);
 	arm_lpae_iopte *ptep = data->pgd;
 	int lvl = ARM_LPAE_START_LVL(data);
+	long iaext = (long)iova >> data->iop.cfg.ias;
 
-	if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias)))
+	if (WARN_ON(iaext && ~iaext))
 		return 0;
 
 	return __arm_lpae_unmap(data, iova, size, lvl, ptep);
-- 
2.21.0.dirty


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-08-19 18:19 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-19 18:19 [PATCH 0/4] iommu/io-pgtable: Cleanup and prep for split tables Robin Murphy
2019-08-19 18:19 ` Robin Murphy
2019-08-19 18:19 ` [PATCH 1/4] iommu/io-pgtable-arm: Rationalise MAIR handling Robin Murphy
2019-08-19 18:19   ` Robin Murphy
2019-08-19 18:19 ` [PATCH 2/4] iommu/io-pgtable-arm: Rationalise TTBRn handling Robin Murphy
2019-08-19 18:19   ` Robin Murphy
2019-08-20 10:19   ` Will Deacon
2019-08-20 10:19     ` Will Deacon
2019-08-20 14:17     ` Robin Murphy
2019-08-20 14:17       ` Robin Murphy
2019-08-20 15:50       ` Will Deacon
2019-08-20 15:50         ` Will Deacon
2019-08-19 18:19 ` [PATCH 3/4] iommu/io-pgtable-arm: Rationalise TCR handling Robin Murphy
2019-08-19 18:19   ` Robin Murphy
2019-08-20 10:31   ` Will Deacon
2019-08-20 10:31     ` Will Deacon
2019-08-20 15:25     ` Robin Murphy
2019-08-20 15:25       ` Robin Murphy
2019-08-20 16:07       ` Will Deacon
2019-08-20 16:07         ` Will Deacon
2019-08-20 18:41         ` Robin Murphy
2019-08-20 18:41           ` Robin Murphy
2019-08-21 12:11           ` Will Deacon
2019-08-21 12:11             ` Will Deacon
2019-08-21 12:56             ` Robin Murphy
2019-08-21 12:56               ` Robin Murphy
2019-10-03 17:33               ` Jordan Crouse
2019-10-03 17:33                 ` Jordan Crouse
2019-10-24 10:51                 ` Will Deacon
2019-10-24 10:51                   ` Will Deacon
2019-10-24 11:23                   ` Robin Murphy
2019-10-24 11:23                     ` Robin Murphy
2019-10-24 11:40                     ` Will Deacon
2019-10-24 11:40                       ` Will Deacon
2019-08-20 16:23       ` Jordan Crouse
2019-08-20 16:23         ` Jordan Crouse
2019-08-19 18:19 ` Robin Murphy [this message]
2019-08-19 18:19   ` [PATCH 4/4] iommu/io-pgtable-arm: Prepare for TTBR1 usage Robin Murphy
2019-08-19 22:34   ` Jordan Crouse
2019-08-19 22:34     ` Jordan Crouse
2019-08-20 13:51     ` Robin Murphy
2019-08-20 13:51       ` Robin Murphy
2019-08-20 10:30   ` Will Deacon
2019-08-20 10:30     ` Will Deacon
2019-08-20 14:51     ` Robin Murphy
2019-08-20 14:51       ` Robin Murphy
2019-08-20 15:58       ` Will Deacon
2019-08-20 15:58         ` Will Deacon

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