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From: Mykyta Poturai <Mykyta_Poturai@epam.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: Mykyta Poturai <Mykyta_Poturai@epam.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien@xen.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	Michal Orzel <michal.orzel@amd.com>
Subject: [XEN PATCH v2 21/25] arm: new VGIC: its: Implement MSI injection in ITS emulation
Date: Fri, 10 Nov 2023 12:56:23 +0000	[thread overview]
Message-ID: <6bb112c2232169798e5110f710cb394071848e74.1699618395.git.mykyta_poturai@epam.com> (raw)
In-Reply-To: <cover.1699618395.git.mykyta_poturai@epam.com>

Implement handling of the ITS INT command.
With the help of the IO bus framework we learn the corresponding
ITS from the doorbell address. We then use our wrapper functions to
iterate the linked lists and find the proper Interrupt Translation Table
Entry (ITTE) and thus the corresponding struct vgic_irq to finally set
the pending bit.

Based on Linux commit 2891a7dfb6c4a by Andre Przywara

Signed-off-by: Mykyta Poturai <mykyta_poturai@epam.com>
---
 xen/arch/arm/vgic/vgic-its.c | 112 +++++++++++++++++++++++++++++++++++
 1 file changed, 112 insertions(+)

diff --git a/xen/arch/arm/vgic/vgic-its.c b/xen/arch/arm/vgic/vgic-its.c
index 9a30087d3d..9534b26334 100644
--- a/xen/arch/arm/vgic/vgic-its.c
+++ b/xen/arch/arm/vgic/vgic-its.c
@@ -557,6 +557,81 @@ static u32 max_lpis_propbaser(u64 propbaser)
     return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS);
 }
 
+int vgic_its_resolve_lpi(struct domain *d, struct vgic_its *its, u32 devid,
+                         u32 eventid, struct vgic_irq **irq)
+{
+    struct vcpu *vcpu;
+    struct its_ite *ite;
+
+    if ( !its->enabled )
+        return -EBUSY;
+
+    ite = find_ite(its, devid, eventid);
+    if ( !ite || !its_is_collection_mapped(ite->collection) )
+        return E_ITS_INT_UNMAPPED_INTERRUPT;
+
+    vcpu = d->vcpu[ite->collection->target_addr];
+    if ( !vcpu )
+        return E_ITS_INT_UNMAPPED_INTERRUPT;
+
+    if ( !vgic_lpis_enabled(vcpu) )
+        return -EBUSY;
+
+    vgic_its_cache_translation(d, its, devid, eventid, ite->irq);
+
+    *irq = ite->irq;
+    return 0;
+}
+
+int vgic_its_inject_cached_translation(struct domain *d, struct vgic_its *its, u32 devid, u32 eventid)
+{
+	struct vgic_irq *irq;
+	unsigned long flags;
+	paddr_t db;
+
+	db = its->vgic_its_base + GITS_TRANSLATER;
+	irq = vgic_its_check_cache(d, db, devid, eventid);
+	if (!irq)
+		return -EWOULDBLOCK;
+
+	spin_lock_irqsave(&irq->irq_lock, flags);
+	irq->pending_latch = true;
+	vgic_queue_irq_unlock(d, irq, flags);
+
+	return 0;
+}
+
+/*
+ * Find the target VCPU and the LPI number for a given devid/eventid pair
+ * and make this IRQ pending, possibly injecting it.
+ * Must be called with the its_lock mutex held.
+ * Returns 0 on success, a positive error value for any ITS mapping
+ * related errors and negative error values for generic errors.
+ */
+static int vgic_its_trigger_msi(struct domain *d, struct vgic_its *its,
+                                u32 devid, u32 eventid)
+{
+    struct vgic_irq *irq = NULL;
+    unsigned long flags;
+    int err;
+
+	if (!vgic_its_inject_cached_translation(d, its, devid, eventid))
+		return 1;
+
+    err = vgic_its_resolve_lpi(d, its, devid, eventid, &irq);
+    if ( err )
+        return err;
+
+    /* GICv4 style VLPIS are not yet supported */
+    WARN_ON(irq->hw);
+
+    spin_lock_irqsave(&irq->irq_lock, flags);
+    irq->pending_latch = true;
+    vgic_queue_irq_unlock(d, irq, flags);
+
+    return 0;
+}
+
 static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)
 {
     return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT(size, ULL) - 1);
@@ -868,6 +943,27 @@ void vgic_its_delete_device(struct domain *d, struct vgic_its_device *its_dev)
     list_del(&its_dev->dev_list);
 }
 
+void vgic_vcpu_inject_lpi(struct domain *d, unsigned int virq)
+{
+    /*
+     * TODO: this assumes that the struct pending_irq stays valid all of
+     * the time. We cannot properly protect this with the current locking
+     * scheme, but the future per-IRQ lock will solve this problem.
+     */
+    struct vgic_irq *p = vgic_get_irq(d, d->vcpu[0], virq);
+    unsigned int vcpu_id;
+
+    if ( !p )
+        return;
+
+    vcpu_id = ACCESS_ONCE(p->target_vcpu->vcpu_id);
+    if ( vcpu_id >= d->max_vcpus )
+          return;
+
+    vgic_put_irq(d, p);
+    vgic_inject_irq(d, d->vcpu[vcpu_id], virq, true);
+}
+
 /*
  * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
  * Must be called with the its_lock mutex held.
@@ -1173,6 +1269,19 @@ static int vgic_its_cmd_handle_movall(struct domain *d, struct vgic_its *its,
     return 0;
 }
 
+/*
+ * The INT command injects the LPI associated with that DevID/EvID pair.
+ * Must be called with the its_lock mutex held.
+ */
+static int vgic_its_cmd_handle_int(struct domain *d, struct vgic_its *its,
+                                   u64 *its_cmd)
+{
+    u32 msi_data  = its_cmd_get_id(its_cmd);
+    u64 msi_devid = its_cmd_get_deviceid(its_cmd);
+
+    return vgic_its_trigger_msi(d, its, msi_devid, msi_data);
+}
+
 int vgic_its_inv_lpi(struct domain *d, struct vgic_irq *irq)
 {
     return update_lpi_config(d, irq, NULL, true);
@@ -1288,6 +1397,9 @@ static int vgic_its_handle_command(struct domain *d, struct vgic_its *its,
     case GITS_CMD_MOVALL:
         ret = vgic_its_cmd_handle_movall(d, its, its_cmd);
         break;
+    case GITS_CMD_INT:
+        ret = vgic_its_cmd_handle_int(d, its, its_cmd);
+        break;
     case GITS_CMD_INV:
         ret = vgic_its_cmd_handle_inv(d, its, its_cmd);
         break;
-- 
2.34.1


  parent reply	other threads:[~2023-11-10 12:56 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-10 12:56 [XEN PATCH v2 00/25] arm: Add GICv3 support to the New VGIC Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 01/25] arm: vgic: its: Decouple HW and virtual ITS Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 02/25] arm: new VGIC: Add GICv3 world switch backend Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 03/25] arm: new VGIC: Add GICv3 MMIO handling framework Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 04/25] arm: new VGIC: Add GICv3 CTLR, IIDR, TYPER handlers Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 05/25] arm: new VGIC: Add GICv3 redistributor IIDR and TYPER handler Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 08/25] arm: new VGIC: Add GICv3 SGI system register trap handler Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 07/25] arm: new VGIC: Add GICv3 IROUTER register handlers Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 06/25] arm: new VGIC: Add GICv3 IDREGS register handler Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 10/25] arm: new VGIC: Add vgic_v3_enable Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 11/25] arm: new VGIC: Add alternative redist region storage Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 09/25] arm: new VGIC: vgic_init: implement map_resources Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 14/25] arm: new VGIC: its: Introduce ITS emulation file with MMIO framework Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 13/25] arm: new VGIC: Handle ITS related GICv3 redistributor registers Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 12/25] arm: new VGIC: Wire new GICv3 into the build system Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 17/25] arm: new VGIC: its: Read initial LPI pending table Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 16/25] arm: new VGIC: its: Implement basic ITS register handlers Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 15/25] arm: new VGIC: its: Introduce ITS device list Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 20/25] arm: new VGIC: its: Implement ITS command queue command handlers Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 18/25] arm: new VGIC: its: Allow updates of LPI configuration table Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 19/25] arm: new VGIC: its: Add LPI translation cache definition Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 23/25] arm: new VGIC: its: Enable ITS emulation as a virtual MSI controller Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 22/25] arm: new VGIC: its: Implement MMIO-based LPI invalidation Mykyta Poturai
2023-11-10 12:56 ` Mykyta Poturai [this message]
2023-11-10 12:56 ` [XEN PATCH v2 25/25] arm: new VGIC: Improve MMIO handling Mykyta Poturai
2023-11-10 12:56 ` [XEN PATCH v2 24/25] arm: new VGIC: its: Wire new ITS into the build system Mykyta Poturai

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