From: Naveen Naidu <naveennaidu479@gmail.com> To: bhelgaas@google.com, tsbogend@alpha.franken.de Cc: Naveen Naidu <naveennaidu479@gmail.com>, linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-mips@vger.kernel.org Subject: [PATCH 5/6] MIPS: OCTEON: Remove redundant ECRC Generation Enable Date: Mon, 4 Oct 2021 23:29:31 +0530 [thread overview] Message-ID: <6d0856b6953765463aac43fbd641d26f19dc7e11.1633369560.git.naveennaidu479@gmail.com> (raw) In-Reply-To: <cover.1633369560.git.naveennaidu479@gmail.com> e8635b484f64 ("MIPS: Add Cavium OCTEON PCI support.") added MIPS specific code to enable PCIe and AER error reporting (*irrespective of CONFIG_PCIEAER value*) because PCI core didn't do that at the time. Currently when CONFIG_PCIEAER=y, ECRC generation is enabled by pcie_set_ecrc_checking() in the aer_probe() path. It is now no longer necessary for Octeon code to enable ECRC since it's done when PCIe bus loads the AER service driver. Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com> --- arch/mips/pci/pci-octeon.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c index a82cf48f00ab..b973fc464c21 100644 --- a/arch/mips/pci/pci-octeon.c +++ b/arch/mips/pci/pci-octeon.c @@ -124,15 +124,6 @@ int pcibios_plat_dev_init(struct pci_dev *dev) */ /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */ - /* Advanced Error Capabilities */ - pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig); - /* ECRC Generation Enable */ - if (config & PCI_ERR_CAP_ECRC_GENC) - config |= PCI_ERR_CAP_ECRC_GENE; - /* ECRC Check Enable */ - if (config & PCI_ERR_CAP_ECRC_CHKC) - config |= PCI_ERR_CAP_ECRC_CHKE; - pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig); /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */ /* Report all errors to the root complex */ pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Naveen Naidu <naveennaidu479@gmail.com> To: bhelgaas@google.com, tsbogend@alpha.franken.de Cc: linux-pci@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org Subject: [PATCH 5/6] MIPS: OCTEON: Remove redundant ECRC Generation Enable Date: Mon, 4 Oct 2021 23:29:31 +0530 [thread overview] Message-ID: <6d0856b6953765463aac43fbd641d26f19dc7e11.1633369560.git.naveennaidu479@gmail.com> (raw) In-Reply-To: <cover.1633369560.git.naveennaidu479@gmail.com> e8635b484f64 ("MIPS: Add Cavium OCTEON PCI support.") added MIPS specific code to enable PCIe and AER error reporting (*irrespective of CONFIG_PCIEAER value*) because PCI core didn't do that at the time. Currently when CONFIG_PCIEAER=y, ECRC generation is enabled by pcie_set_ecrc_checking() in the aer_probe() path. It is now no longer necessary for Octeon code to enable ECRC since it's done when PCIe bus loads the AER service driver. Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com> --- arch/mips/pci/pci-octeon.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c index a82cf48f00ab..b973fc464c21 100644 --- a/arch/mips/pci/pci-octeon.c +++ b/arch/mips/pci/pci-octeon.c @@ -124,15 +124,6 @@ int pcibios_plat_dev_init(struct pci_dev *dev) */ /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */ - /* Advanced Error Capabilities */ - pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig); - /* ECRC Generation Enable */ - if (config & PCI_ERR_CAP_ECRC_GENC) - config |= PCI_ERR_CAP_ECRC_GENE; - /* ECRC Check Enable */ - if (config & PCI_ERR_CAP_ECRC_CHKC) - config |= PCI_ERR_CAP_ECRC_CHKE; - pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig); /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */ /* Report all errors to the root complex */ pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, -- 2.25.1 _______________________________________________ Linux-kernel-mentees mailing list Linux-kernel-mentees@lists.linuxfoundation.org https://lists.linuxfoundation.org/mailman/listinfo/linux-kernel-mentees
next prev parent reply other threads:[~2021-10-04 18:02 UTC|newest] Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-04 17:59 [PATCH 0/6] MIPS: OCTEON: Remove redundant AER code Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu 2021-10-04 17:59 ` [PATCH 1/6] PCI/AER: Enable COR/UNCOR error reporting in set_device_error_reporting() Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu 2021-10-19 22:44 ` Bjorn Helgaas 2021-10-19 22:44 ` Bjorn Helgaas 2021-10-19 22:44 ` Bjorn Helgaas 2021-10-04 17:59 ` [PATCH 2/6] MIPS: OCTEON: Remove redundant clearing of AER status registers Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu 2021-10-19 22:53 ` Bjorn Helgaas 2021-10-19 22:53 ` Bjorn Helgaas 2021-10-04 17:59 ` [PATCH 3/6] MIPS: OCTEON: Remove redundant enable of PCIe normal error reporting Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu 2021-10-04 17:59 ` [PATCH 4/6] MIPS: OCTEON: Remove redundant enable of COR/UNCOR error Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu [this message] 2021-10-04 17:59 ` [PATCH 5/6] MIPS: OCTEON: Remove redundant ECRC Generation Enable Naveen Naidu 2021-10-04 17:59 ` [PATCH 6/6] MIPS: OCTEON: Remove redundant enable of RP error reporting Naveen Naidu 2021-10-04 17:59 ` Naveen Naidu
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