[PATCH/RFC 2/2] ARM: dts: r8a7779: Correct internal delay for i2c[123]

[Geert Uytterhoeven <geert+renesas@glider.be>]

According to the R-Car H1 Hardware User's Manual Rev. 1.00, the LSI
internal delay for I2C instances 1 to 3 is 5 ns (typ.), which differs
from the default 50 ns as specified for instance 0.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
i2c[123] are not used in upstream DTS files.
---
 arch/arm/boot/dts/r8a7779.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 3c5fcdfe16b87182..39fc58f32df61b9a 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -198,6 +198,7 @@ i2c1: i2c@ffc71000 {
 		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp0_clks R8A7779_CLK_I2C1>;
 		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
+		i2c-scl-internal-delay-ns = <5>;
 		status = "disabled";
 	};
 
@@ -209,6 +210,7 @@ i2c2: i2c@ffc72000 {
 		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp0_clks R8A7779_CLK_I2C2>;
 		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
+		i2c-scl-internal-delay-ns = <5>;
 		status = "disabled";
 	};
 
@@ -220,6 +222,7 @@ i2c3: i2c@ffc73000 {
 		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp0_clks R8A7779_CLK_I2C3>;
 		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
+		i2c-scl-internal-delay-ns = <5>;
 		status = "disabled";
 	};
 
-- 
2.25.1