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From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: linux-actions@lists.infradead.org,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 01/11] clk: actions: Fix h_clk for Actions S500 SoC
Date: Wed, 17 Jun 2020 19:48:01 +0300	[thread overview]
Message-ID: <7b50d637e7c69e8c91e16354ca1ee0e91e516f3b.1592407030.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1592407030.git.cristian.ciocaltea@gmail.com>

The h_clk clock in the Actions Semi S500 SoC clock driver has an
invalid parent. Replace with the correct one.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 drivers/clk/actions/owl-s500.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/actions/owl-s500.c b/drivers/clk/actions/owl-s500.c
index e2007ac4d235..0eb83a0b70bc 100644
--- a/drivers/clk/actions/owl-s500.c
+++ b/drivers/clk/actions/owl-s500.c
@@ -183,7 +183,7 @@ static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
 static OWL_GATE(hdmi_clk, "hdmi_clk", "hosc", CMU_DEVCLKEN1, 3, 0, 0);
 
 /* divider clocks */
-static OWL_DIVIDER(h_clk, "h_clk", "ahbprevdiv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
+static OWL_DIVIDER(h_clk, "h_clk", "ahbprediv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
 static OWL_DIVIDER(rmii_ref_clk, "rmii_ref_clk", "ethernet_pll_clk", CMU_ETHERNETPLL, 1, 1, rmii_ref_div_table, 0, 0);
 
 /* factor clocks */
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/11] clk: actions: Fix h_clk for Actions S500 SoC
Date: Wed, 17 Jun 2020 19:48:01 +0300	[thread overview]
Message-ID: <7b50d637e7c69e8c91e16354ca1ee0e91e516f3b.1592407030.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1592407030.git.cristian.ciocaltea@gmail.com>

The h_clk clock in the Actions Semi S500 SoC clock driver has an
invalid parent. Replace with the correct one.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 drivers/clk/actions/owl-s500.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/actions/owl-s500.c b/drivers/clk/actions/owl-s500.c
index e2007ac4d235..0eb83a0b70bc 100644
--- a/drivers/clk/actions/owl-s500.c
+++ b/drivers/clk/actions/owl-s500.c
@@ -183,7 +183,7 @@ static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
 static OWL_GATE(hdmi_clk, "hdmi_clk", "hosc", CMU_DEVCLKEN1, 3, 0, 0);
 
 /* divider clocks */
-static OWL_DIVIDER(h_clk, "h_clk", "ahbprevdiv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
+static OWL_DIVIDER(h_clk, "h_clk", "ahbprediv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
 static OWL_DIVIDER(rmii_ref_clk, "rmii_ref_clk", "ethernet_pll_clk", CMU_ETHERNETPLL, 1, 1, rmii_ref_div_table, 0, 0);
 
 /* factor clocks */
-- 
2.27.0


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  reply	other threads:[~2020-06-17 16:49 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-17 16:48 [PATCH 00/11] Add CMU/RMU/DMA support for Actions Semi S500 SoCs Cristian Ciocaltea
2020-06-17 16:48 ` Cristian Ciocaltea
2020-06-17 16:48 ` Cristian Ciocaltea [this message]
2020-06-17 16:48   ` [PATCH 01/11] clk: actions: Fix h_clk for Actions S500 SoC Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 02/11] arm: dts: owl-s500: Add Clock Management Unit Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 03/11] arm: dts: owl-s500: Set UART clock refs from CMU Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 04/11] arm: dts: owl-s500-roseapplepi: Use UART clock " Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 05/11] dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 06/11] clk: actions: Add APB, DMAC, GPIO clock support " Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 07/11] arm: dts: owl-s500: Add DMA controller Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 08/11] dt-bindings: reset: Add binding constants for Actions S500 RMU Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 09/11] clk: actions: Add Actions S500 SoC Reset Management Unit support Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-22  8:12   ` Stephen Boyd
2020-06-22 12:23     ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 10/11] arm: dts: owl-s500: Add Reset Controller support Cristian Ciocaltea
2020-06-17 16:48   ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 11/11] MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs Cristian Ciocaltea
     [not found] ` <159281361144.62212.15284914532690869405@swboyd.mtv.corp.google.com>
2020-06-22 12:18   ` [PATCH 00/11] Add CMU/RMU/DMA support for Actions Semi S500 SoCs Cristian Ciocaltea

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