From: Amit Kucheria <amit.kucheria@linaro.org>
To: linux-kernel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org,
viresh.kumar@linaro.org, edubezval@gmail.com,
andy.gross@linaro.org, tdas@codeaurora.org, swboyd@chromium.org,
dianders@chromium.org, mka@chromium.org,
David Brown <david.brown@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>
Subject: [PATCH v2 8/9] arm64: dts: sdm845: wireup the thermal trip points to cpufreq
Date: Mon, 14 Jan 2019 15:51:10 +0530 [thread overview]
Message-ID: <7f94696460848a6bcfe5aee5ffda7fe556240736.1547458732.git.amit.kucheria@linaro.org> (raw)
In-Reply-To: <cover.1547458732.git.amit.kucheria@linaro.org>
In-Reply-To: <cover.1547458732.git.amit.kucheria@linaro.org>
Since all cpus in the big and little clusters, respectively, are in the
same frequency domain, use all of them for mitigation in the
cooling-map. We end up with two cooling devices - one each for the big
and little clusters.
At the lower trip points we restrict ourselves to throttling only a few
OPPs. At higher trip temperatures, allow ourselves to be throttled to
any extent.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 177 ++++++++++++++++++++++++---
1 file changed, 161 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index fb7da678b116..7973e88bdf94 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
@@ -99,6 +100,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x0>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -116,6 +118,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x100>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_100>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -130,6 +133,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x200>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_200>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -144,6 +148,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x300>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_300>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -158,6 +163,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x400>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_400>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -172,6 +178,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x500>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_500>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -186,6 +193,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x600>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_600>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -200,6 +208,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x700>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_700>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -1719,18 +1728,35 @@
thermal-sensors = <&tsens0 1>;
trips {
- cpu_alert0: trip0 {
+ cpu0_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit0: trip1 {
+ cpu0_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu0_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu0_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu1-thermal {
@@ -1740,18 +1766,35 @@
thermal-sensors = <&tsens0 2>;
trips {
- cpu_alert1: trip0 {
+ cpu1_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit1: trip1 {
+ cpu1_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu1_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu1_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu2-thermal {
@@ -1761,18 +1804,35 @@
thermal-sensors = <&tsens0 3>;
trips {
- cpu_alert2: trip0 {
+ cpu2_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit2: trip1 {
+ cpu2_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu2_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu2_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu3-thermal {
@@ -1782,18 +1842,35 @@
thermal-sensors = <&tsens0 4>;
trips {
- cpu_alert3: trip0 {
+ cpu3_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit3: trip1 {
+ cpu3_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu3_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu3_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu4-thermal {
@@ -1803,18 +1880,35 @@
thermal-sensors = <&tsens0 7>;
trips {
- cpu_alert4: trip0 {
+ cpu4_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit4: trip1 {
+ cpu4_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu4_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu4_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu5-thermal {
@@ -1824,18 +1918,35 @@
thermal-sensors = <&tsens0 8>;
trips {
- cpu_alert5: trip0 {
+ cpu5_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit5: trip1 {
+ cpu5_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu5_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu5_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu6-thermal {
@@ -1845,18 +1956,35 @@
thermal-sensors = <&tsens0 9>;
trips {
- cpu_alert6: trip0 {
+ cpu6_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit6: trip1 {
+ cpu6_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu6_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu6_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu7-thermal {
@@ -1866,18 +1994,35 @@
thermal-sensors = <&tsens0 10>;
trips {
- cpu_alert7: trip0 {
+ cpu7_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit7: trip1 {
+ cpu7_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu7_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu7_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
};
};
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Amit Kucheria <amit.kucheria@linaro.org>
To: linux-kernel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org,
viresh.kumar@linaro.org, edubezval@gmail.com,
andy.gross@linaro.org, tdas@codeaurora.org, swboyd@chromium.org,
dianders@chromium.org, mka@chromium.org,
David Brown <david.brown@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS)
Subject: [PATCH v2 8/9] arm64: dts: sdm845: wireup the thermal trip points to cpufreq
Date: Mon, 14 Jan 2019 15:51:10 +0530 [thread overview]
Message-ID: <7f94696460848a6bcfe5aee5ffda7fe556240736.1547458732.git.amit.kucheria@linaro.org> (raw)
In-Reply-To: <cover.1547458732.git.amit.kucheria@linaro.org>
In-Reply-To: <cover.1547458732.git.amit.kucheria@linaro.org>
Since all cpus in the big and little clusters, respectively, are in the
same frequency domain, use all of them for mitigation in the
cooling-map. We end up with two cooling devices - one each for the big
and little clusters.
At the lower trip points we restrict ourselves to throttling only a few
OPPs. At higher trip temperatures, allow ourselves to be throttled to
any extent.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 177 ++++++++++++++++++++++++---
1 file changed, 161 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index fb7da678b116..7973e88bdf94 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
@@ -99,6 +100,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x0>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -116,6 +118,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x100>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_100>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -130,6 +133,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x200>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_200>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -144,6 +148,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x300>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_300>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -158,6 +163,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x400>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_400>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -172,6 +178,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x500>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_500>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -186,6 +193,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x600>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_600>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -200,6 +208,7 @@
compatible = "qcom,kryo385";
reg = <0x0 0x700>;
enable-method = "psci";
+ #cooling-cells = <2>;
next-level-cache = <&L2_700>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -1719,18 +1728,35 @@
thermal-sensors = <&tsens0 1>;
trips {
- cpu_alert0: trip0 {
+ cpu0_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit0: trip1 {
+ cpu0_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu0_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu0_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu1-thermal {
@@ -1740,18 +1766,35 @@
thermal-sensors = <&tsens0 2>;
trips {
- cpu_alert1: trip0 {
+ cpu1_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit1: trip1 {
+ cpu1_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu1_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu1_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu2-thermal {
@@ -1761,18 +1804,35 @@
thermal-sensors = <&tsens0 3>;
trips {
- cpu_alert2: trip0 {
+ cpu2_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit2: trip1 {
+ cpu2_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu2_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu2_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu3-thermal {
@@ -1782,18 +1842,35 @@
thermal-sensors = <&tsens0 4>;
trips {
- cpu_alert3: trip0 {
+ cpu3_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit3: trip1 {
+ cpu3_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu3_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT 4>,
+ <&CPU1 THERMAL_NO_LIMIT 4>,
+ <&CPU2 THERMAL_NO_LIMIT 4>,
+ <&CPU3 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu3_crit>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu4-thermal {
@@ -1803,18 +1880,35 @@
thermal-sensors = <&tsens0 7>;
trips {
- cpu_alert4: trip0 {
+ cpu4_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit4: trip1 {
+ cpu4_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu4_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu4_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu5-thermal {
@@ -1824,18 +1918,35 @@
thermal-sensors = <&tsens0 8>;
trips {
- cpu_alert5: trip0 {
+ cpu5_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit5: trip1 {
+ cpu5_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu5_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu5_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu6-thermal {
@@ -1845,18 +1956,35 @@
thermal-sensors = <&tsens0 9>;
trips {
- cpu_alert6: trip0 {
+ cpu6_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit6: trip1 {
+ cpu6_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu6_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu6_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu7-thermal {
@@ -1866,18 +1994,35 @@
thermal-sensors = <&tsens0 10>;
trips {
- cpu_alert7: trip0 {
+ cpu7_alert0: trip-point@0 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit7: trip1 {
+ cpu7_crit: cpu_crit@0 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu7_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT 4>,
+ <&CPU5 THERMAL_NO_LIMIT 4>,
+ <&CPU6 THERMAL_NO_LIMIT 4>,
+ <&CPU7 THERMAL_NO_LIMIT 4>;
+ };
+ map1 {
+ trip = <&cpu7_crit>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
};
};
--
2.17.1
next prev parent reply other threads:[~2019-01-14 10:21 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-14 10:21 [PATCH v2 0/9] Thermal throttling for SDM845 Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-14 10:21 ` [PATCH v2 1/9] [ALREADY QUEUED] cpufreq: qcom-hw: Move to device_initcall Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-17 6:03 ` Viresh Kumar
2019-01-14 10:21 ` [PATCH v2 2/9] drivers: thermal: of-thermal: Print name of device node with error Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-14 23:54 ` Stephen Boyd
2019-01-21 9:39 ` Amit Kucheria
2019-01-14 10:21 ` [PATCH v2 3/9] drivers: cpufreq: Add thermal_cooling_device pointer to struct cpufreq_policy Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-14 23:54 ` Stephen Boyd
2019-01-14 10:21 ` [PATCH v2 4/9] cpufreq: Add a flag to auto-register a cooling device Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-14 23:57 ` Stephen Boyd
2019-01-21 14:23 ` Amit Kucheria
2019-01-14 10:21 ` [PATCH v2 5/9] cpufreq: Replace open-coded << with BIT() Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-14 10:21 ` [PATCH v2 6/9] cpufreq: qcom-hw: Register as a cpufreq cooling device Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-14 23:58 ` Stephen Boyd
2019-01-14 10:21 ` [PATCH v2 7/9] arm64: dts: sdm845: Increase alert trip point to 95 degrees Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria [this message]
2019-01-14 10:21 ` [PATCH v2 8/9] arm64: dts: sdm845: wireup the thermal trip points to cpufreq Amit Kucheria
2019-01-14 22:01 ` Matthias Kaehlcke
2019-01-14 22:01 ` Matthias Kaehlcke
2019-01-21 18:10 ` Amit Kucheria
2019-01-21 18:10 ` Amit Kucheria
2019-01-22 18:18 ` Matthias Kaehlcke
2019-01-22 18:18 ` Matthias Kaehlcke
2019-01-14 10:21 ` [PATCH v2 9/9] thermal: cpu_cooling: Clarify error message Amit Kucheria
2019-01-14 10:21 ` Amit Kucheria
2019-01-17 5:57 ` Viresh Kumar
2019-01-17 10:34 ` Rafael J. Wysocki
2019-01-21 9:43 ` Amit Kucheria
2019-01-14 10:27 ` [PATCH v2 0/9] Thermal throttling for SDM845 Rafael J. Wysocki
2019-01-14 10:27 ` Rafael J. Wysocki
2019-01-14 10:34 ` Amit Kucheria
2019-01-14 10:34 ` Amit Kucheria
2019-01-14 16:52 ` Amit Kucheria
2019-01-14 16:52 ` Amit Kucheria
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