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From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: [PATCH v3 16/21] pinctrl: renesas: r8a779g0: add missing TPU0TOx_A
Date: Tue, 14 Jun 2022 06:00:26 +0000	[thread overview]
Message-ID: <87h74nkcna.wl-kuninori.morimoto.gx@renesas.com> (raw)
In-Reply-To: <874k0nlrbw.wl-kuninori.morimoto.gx@renesas.com>


From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

This patch adds missing TPU0TOx_A

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 drivers/pinctrl/renesas/pfc-r8a779g0.c | 54 ++++++++++++++++++++++++--
 1 file changed, 50 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index 5bee4ab2d132..18881a651d1b 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -320,15 +320,15 @@
 
 /* IP3SR1 */		/* 0 */			/* 1 */			/* 2 */		/* 3		4	 5	  6	   7	    8	     9	      A	       B	C	 D	  E	   F */
 #define IP3SR1_3_0	FM(HRX3)		FM(SCK3_A)		FM(MSIOF4_SS2)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_7_4	FM(HSCK3)		FM(CTS3_A_N)		FM(MSIOF4_SCK)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_11_8	FM(HRTS3_N)		FM(RTS3_A_N)		FM(MSIOF4_TXD)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_7_4	FM(HSCK3)		FM(CTS3_A_N)		FM(MSIOF4_SCK)	FM(TPU0TO0_A)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_11_8	FM(HRTS3_N)		FM(RTS3_A_N)		FM(MSIOF4_TXD)	FM(TPU0TO1_A)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP3SR1_15_12	FM(HCTS3_N)		FM(RX3_A)		FM(MSIOF4_RXD)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP3SR1_19_16	FM(HTX3)		FM(TX3_A)		FM(MSIOF4_SYNC)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 
 /* SR2 */
 /* IP0SR2 */		/* 0 */			/* 1 */			/* 2 */		/* 3		4	 5	  6	   7	    8	     9	      A	       B	C	 D	  E	   F */
-#define IP0SR2_3_0	FM(FXR_TXDA)		FM(CANFD1_TX)		F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR2_7_4	FM(FXR_TXENA_N)		FM(CANFD1_RX)		F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR2_3_0	FM(FXR_TXDA)		FM(CANFD1_TX)		FM(TPU0TO2_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR2_7_4	FM(FXR_TXENA_N)		FM(CANFD1_RX)		FM(TPU0TO3_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR2_11_8	FM(RXDA_EXTFXR)		FM(CANFD5_TX)		FM(IRQ5)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR2_15_12	FM(CLK_EXTFXR)		FM(CANFD5_RX)		FM(IRQ4_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR2_19_16	FM(RXDB_EXTFXR)		F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -919,10 +919,12 @@ static const u16 pinmux_data[] = {
 	PINMUX_IPSR_GPSR(IP3SR1_7_4,	HSCK3),
 	PINMUX_IPSR_GPSR(IP3SR1_7_4,	CTS3_A_N),
 	PINMUX_IPSR_GPSR(IP3SR1_7_4,	MSIOF4_SCK),
+	PINMUX_IPSR_GPSR(IP3SR1_7_4,	TPU0TO0_A),
 
 	PINMUX_IPSR_GPSR(IP3SR1_11_8,	HRTS3_N),
 	PINMUX_IPSR_GPSR(IP3SR1_11_8,	RTS3_A_N),
 	PINMUX_IPSR_GPSR(IP3SR1_11_8,	MSIOF4_TXD),
+	PINMUX_IPSR_GPSR(IP3SR1_11_8,	TPU0TO1_A),
 
 	PINMUX_IPSR_GPSR(IP3SR1_15_12,	HCTS3_N),
 	PINMUX_IPSR_GPSR(IP3SR1_15_12,	RX3_A),
@@ -935,9 +937,11 @@ static const u16 pinmux_data[] = {
 	/* IP0SR2 */
 	PINMUX_IPSR_GPSR(IP0SR2_3_0,	FXR_TXDA),
 	PINMUX_IPSR_GPSR(IP0SR2_3_0,	CANFD1_TX),
+	PINMUX_IPSR_GPSR(IP0SR2_3_0,	TPU0TO2_A),
 
 	PINMUX_IPSR_GPSR(IP0SR2_7_4,	FXR_TXENA_N),
 	PINMUX_IPSR_GPSR(IP0SR2_7_4,	CANFD1_RX),
+	PINMUX_IPSR_GPSR(IP0SR2_7_4,	TPU0TO3_A),
 
 	PINMUX_IPSR_GPSR(IP0SR2_11_8,	RXDA_EXTFXR),
 	PINMUX_IPSR_GPSR(IP0SR2_11_8,	CANFD5_TX),
@@ -2357,6 +2361,36 @@ static const unsigned int tpu_to3_mux[] = {
 	TPU0TO3_MARK,
 };
 
+/* - TPU_A ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_a_pins[] = {
+	/* TPU0TO0_A */
+	RCAR_GP_PIN(1, 25),
+};
+static const unsigned int tpu_to0_a_mux[] = {
+	TPU0TO0_A_MARK,
+};
+static const unsigned int tpu_to1_a_pins[] = {
+	/* TPU0TO1_A */
+	RCAR_GP_PIN(1, 26),
+};
+static const unsigned int tpu_to1_a_mux[] = {
+	TPU0TO1_A_MARK,
+};
+static const unsigned int tpu_to2_a_pins[] = {
+	/* TPU0TO2_A */
+	RCAR_GP_PIN(2, 0),
+};
+static const unsigned int tpu_to2_a_mux[] = {
+	TPU0TO2_A_MARK,
+};
+static const unsigned int tpu_to3_a_pins[] = {
+	/* TPU0TO3_A */
+	RCAR_GP_PIN(2, 1),
+};
+static const unsigned int tpu_to3_a_mux[] = {
+	TPU0TO3_A_MARK,
+};
+
 /* - TSN0 ------------------------------------------------ */
 static const unsigned int tsn0_link_pins[] = {
 	/* TSN0_LINK */
@@ -2588,9 +2622,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(scif_clk),
 
 	SH_PFC_PIN_GROUP(tpu_to0),
+	SH_PFC_PIN_GROUP(tpu_to0_a),
 	SH_PFC_PIN_GROUP(tpu_to1),
+	SH_PFC_PIN_GROUP(tpu_to1_a),
 	SH_PFC_PIN_GROUP(tpu_to2),
+	SH_PFC_PIN_GROUP(tpu_to2_a),
 	SH_PFC_PIN_GROUP(tpu_to3),
+	SH_PFC_PIN_GROUP(tpu_to3_a),
 
 	SH_PFC_PIN_GROUP(tsn0_link),
 	SH_PFC_PIN_GROUP(tsn0_phy_int),
@@ -2906,6 +2944,13 @@ static const char * const tpu_groups[] = {
 	"tpu_to3",
 };
 
+static const char * const tpu_a_groups[] = {
+	"tpu_to0_a",
+	"tpu_to1_a",
+	"tpu_to2_a",
+	"tpu_to3_a",
+};
+
 static const char * const tsn0_groups[] = {
 	"tsn0_link",
 	"tsn0_phy_int",
@@ -2981,6 +3026,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(scif_clk),
 
 	SH_PFC_FUNCTION(tpu),
+	SH_PFC_FUNCTION(tpu_a),
 
 	SH_PFC_FUNCTION(tsn0),
 };
-- 
2.25.1


  parent reply	other threads:[~2022-06-14  6:00 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-14  5:57 [PATCH v3 00/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-06-14  5:58 ` [PATCH v3 01/21] dt-bindings: pinctrl: renesas,pfc: Document r8a779g0 support Kuninori Morimoto
2022-06-17 12:30   ` Geert Uytterhoeven
2022-06-14  5:58 ` [PATCH v3 02/21] pinctrl: renesas: Add PORT_GP_CFG_13 macros Kuninori Morimoto
2022-06-17 12:30   ` Geert Uytterhoeven
2022-06-14  5:58 ` [PATCH v3 03/21] pinctrl: renesas: Initial R8A779G0 (V4H) PFC support Kuninori Morimoto
2022-06-17 15:13   ` Geert Uytterhoeven
2022-06-20  0:18     ` Kuninori Morimoto
2022-06-20  6:21       ` Geert Uytterhoeven
2022-06-20  6:58         ` Kuninori Morimoto
2022-06-14  5:58 ` [PATCH v3 04/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-06-17 15:15   ` Geert Uytterhoeven
2022-06-14  5:59 ` [PATCH v3 05/21] pinctrl: renesas: r8a779g0: remove not used NOGP definitions Kuninori Morimoto
2022-06-17 15:16   ` Geert Uytterhoeven
2022-06-14  5:59 ` [PATCH v3 06/21] pinctrl: renesas: r8a779g0: remove not used IPxSRx definitions Kuninori Morimoto
2022-06-17 15:17   ` Geert Uytterhoeven
2022-06-14  5:59 ` [PATCH v3 07/21] pinctrl: renesas: r8a779g0: remove not used MOD_SELx definitions Kuninori Morimoto
2022-06-17 15:17   ` Geert Uytterhoeven
2022-06-21  0:12     ` Kuninori Morimoto
2022-06-21  6:36       ` Geert Uytterhoeven
2022-06-14  5:59 ` [PATCH v3 08/21] pinctrl: renesas: r8a779g0: tidyup ioctrl_regs Kuninori Morimoto
2022-06-17 15:17   ` Geert Uytterhoeven
2022-06-14  5:59 ` [PATCH v3 09/21] pinctrl: renesas: r8a779g0: add missing TCLKx_A/TCLK_B/TCLKx_X Kuninori Morimoto
2022-06-17 15:17   ` Geert Uytterhoeven
2022-06-29  1:26     ` Kuninori Morimoto
2022-06-29  2:49       ` Kuninori Morimoto
2022-06-29  7:16         ` Geert Uytterhoeven
2022-06-29 23:37           ` Kuninori Morimoto
2022-06-30  9:30             ` Geert Uytterhoeven
2022-06-30 23:35               ` Kuninori Morimoto
2022-06-14  5:59 ` [PATCH v3 10/21] pinctrl: renesas: r8a779g0: add missing IRQx_A/IRQx_B Kuninori Morimoto
2022-06-17 15:18   ` Geert Uytterhoeven
2022-06-14  5:59 ` [PATCH v3 11/21] pinctrl: renesas: r8a779g0: add missing HSCIF3_A Kuninori Morimoto
2022-06-17 15:18   ` Geert Uytterhoeven
2022-06-14  5:59 ` [PATCH v3 12/21] pinctrl: renesas: r8a779g0: add missing HSCIF1_X Kuninori Morimoto
2022-06-17 15:18   ` Geert Uytterhoeven
2022-06-14  6:00 ` [PATCH v3 13/21] pinctrl: renesas: r8a779g0: add missing SCIF3 Kuninori Morimoto
2022-06-17 15:18   ` Geert Uytterhoeven
2022-06-14  6:00 ` [PATCH v3 14/21] pinctrl: renesas: r8a779g0: add missing SCIF1_X Kuninori Morimoto
2022-06-17 15:18   ` Geert Uytterhoeven
2022-06-14  6:00 ` [PATCH v3 15/21] pinctrl: renesas: r8a779g0: add missing CANFD5_B Kuninori Morimoto
2022-06-17 15:18   ` Geert Uytterhoeven
2022-06-14  6:00 ` Kuninori Morimoto [this message]
2022-06-17 15:18   ` [PATCH v3 16/21] pinctrl: renesas: r8a779g0: add missing TPU0TOx_A Geert Uytterhoeven
2022-06-14  6:00 ` [PATCH v3 17/21] pinctrl: renesas: r8a779g0: add missing FlaxRay Kuninori Morimoto
2022-06-17 15:18   ` Geert Uytterhoeven
2022-06-14  6:00 ` [PATCH v3 18/21] pinctrl: renesas: r8a779g0: add missing PWM Kuninori Morimoto
2022-06-17 15:19   ` Geert Uytterhoeven
2022-06-14  6:00 ` [PATCH v3 19/21] pinctrl: renesas: r8a779g0: add missing ERROROUTC_A Kuninori Morimoto
2022-06-17 15:19   ` Geert Uytterhoeven
2022-06-14  6:00 ` [PATCH v3 20/21] pinctrl: renesas: r8a779g0: add missing MODSELx for TSN0 Kuninori Morimoto
2022-06-17 15:19   ` Geert Uytterhoeven
2022-06-14  6:01 ` [PATCH v3 21/21] pinctrl: renesas: r8a779g0: add missing MODSELx for AVBx Kuninori Morimoto
2022-06-17 15:19   ` Geert Uytterhoeven

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