From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: [PATCH v3 12/21] pinctrl: renesas: r8a779g0: add missing HSCIF1_X
Date: Tue, 14 Jun 2022 05:59:53 +0000 [thread overview]
Message-ID: <87mtefkco7.wl-kuninori.morimoto.gx@renesas.com> (raw)
In-Reply-To: <874k0nlrbw.wl-kuninori.morimoto.gx@renesas.com>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This patch adds missing HSCIF1.
Because Document has 2xHSCIF1 with no suffix (_A, _B),
this patch name it as _X.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a779g0.c | 50 +++++++++++++++++++++++---
1 file changed, 45 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index d84fa59a0bcc..8af0bc89d4e1 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -295,13 +295,13 @@
#define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_23_20 FM(MSIOF1_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_27_24 FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_31_28 FM(MSIOF0_SS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_31_28 FM(MSIOF0_SS1) FM(HRX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IP1SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP1SR1_3_0 FM(MSIOF0_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR1_7_4 FM(MSIOF0_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1SR1_11_8 FM(MSIOF0_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR1_3_0 FM(MSIOF0_SYNC) FM(HCTS1_X_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR1_7_4 FM(MSIOF0_TXD) FM(HRTS1_X_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1SR1_11_8 FM(MSIOF0_SCK) FM(HSCK1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR1_15_12 FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR1_19_16 FM(HTX0) FM(TX0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1SR1_23_20 FM(HCTS0_N) FM(CTS0_N) FM(PWM8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -839,15 +839,22 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP0SR1_19_16, HRX3_A),
PINMUX_IPSR_GPSR(IP0SR1_23_20, MSIOF1_RXD),
+
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2),
+ PINMUX_IPSR_GPSR(IP0SR1_27_24, HTX1_X),
+
PINMUX_IPSR_GPSR(IP0SR1_31_28, MSIOF0_SS1),
+ PINMUX_IPSR_GPSR(IP0SR1_31_28, HRX1_X),
/* IP1SR1 */
PINMUX_IPSR_GPSR(IP1SR1_3_0, MSIOF0_SYNC),
+ PINMUX_IPSR_GPSR(IP1SR1_3_0, HCTS1_X_N),
PINMUX_IPSR_GPSR(IP1SR1_7_4, MSIOF0_TXD),
+ PINMUX_IPSR_GPSR(IP1SR1_7_4, HRTS1_X_N),
PINMUX_IPSR_GPSR(IP1SR1_11_8, MSIOF0_SCK),
+ PINMUX_IPSR_GPSR(IP1SR1_11_8, HSCK1_X),
PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_RXD),
@@ -1554,6 +1561,29 @@ static const unsigned int hscif1_ctrl_mux[] = {
HRTS1_N_MARK, HCTS1_N_MARK,
};
+/* - HSCIF1_X---------------------------------------------------------------- */
+static const unsigned int hscif1_x_data_pins[] = {
+ /* HRX1_X, HTX1_X */
+ RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6),
+};
+static const unsigned int hscif1_x_data_mux[] = {
+ HRX1_X_MARK, HTX1_X_MARK,
+};
+static const unsigned int hscif1_x_clk_pins[] = {
+ /* HSCK1_X */
+ RCAR_GP_PIN(1, 10),
+};
+static const unsigned int hscif1_x_clk_mux[] = {
+ HSCK1_X_MARK,
+};
+static const unsigned int hscif1_x_ctrl_pins[] = {
+ /* HRTS1_X_N, HCTS1_X_N */
+ RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8),
+};
+static const unsigned int hscif1_x_ctrl_mux[] = {
+ HRTS1_X_N_MARK, HCTS1_X_N_MARK,
+};
+
/* - HSCIF2 ----------------------------------------------------------------- */
static const unsigned int hscif2_data_pins[] = {
/* HRX2, HTX2 */
@@ -2378,6 +2408,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(hscif1_data),
SH_PFC_PIN_GROUP(hscif1_clk),
SH_PFC_PIN_GROUP(hscif1_ctrl),
+ SH_PFC_PIN_GROUP(hscif1_x_data),
+ SH_PFC_PIN_GROUP(hscif1_x_clk),
+ SH_PFC_PIN_GROUP(hscif1_x_ctrl),
SH_PFC_PIN_GROUP(hscif2_data),
SH_PFC_PIN_GROUP(hscif2_clk),
SH_PFC_PIN_GROUP(hscif2_ctrl),
@@ -2579,6 +2612,12 @@ static const char * const hscif1_groups[] = {
"hscif1_ctrl",
};
+static const char * const hscif1_x_groups[] = {
+ "hscif1_x_data",
+ "hscif1_x_clk",
+ "hscif1_x_ctrl",
+};
+
static const char * const hscif2_groups[] = {
"hscif2_data",
"hscif2_clk",
@@ -2805,6 +2844,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
+ SH_PFC_FUNCTION(hscif1_x),
SH_PFC_FUNCTION(hscif2),
SH_PFC_FUNCTION(hscif3),
SH_PFC_FUNCTION(hscif3_a),
--
2.25.1
next prev parent reply other threads:[~2022-06-14 5:59 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-14 5:57 [PATCH v3 00/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-06-14 5:58 ` [PATCH v3 01/21] dt-bindings: pinctrl: renesas,pfc: Document r8a779g0 support Kuninori Morimoto
2022-06-17 12:30 ` Geert Uytterhoeven
2022-06-14 5:58 ` [PATCH v3 02/21] pinctrl: renesas: Add PORT_GP_CFG_13 macros Kuninori Morimoto
2022-06-17 12:30 ` Geert Uytterhoeven
2022-06-14 5:58 ` [PATCH v3 03/21] pinctrl: renesas: Initial R8A779G0 (V4H) PFC support Kuninori Morimoto
2022-06-17 15:13 ` Geert Uytterhoeven
2022-06-20 0:18 ` Kuninori Morimoto
2022-06-20 6:21 ` Geert Uytterhoeven
2022-06-20 6:58 ` Kuninori Morimoto
2022-06-14 5:58 ` [PATCH v3 04/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-06-17 15:15 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 05/21] pinctrl: renesas: r8a779g0: remove not used NOGP definitions Kuninori Morimoto
2022-06-17 15:16 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 06/21] pinctrl: renesas: r8a779g0: remove not used IPxSRx definitions Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 07/21] pinctrl: renesas: r8a779g0: remove not used MOD_SELx definitions Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-21 0:12 ` Kuninori Morimoto
2022-06-21 6:36 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 08/21] pinctrl: renesas: r8a779g0: tidyup ioctrl_regs Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 09/21] pinctrl: renesas: r8a779g0: add missing TCLKx_A/TCLK_B/TCLKx_X Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-29 1:26 ` Kuninori Morimoto
2022-06-29 2:49 ` Kuninori Morimoto
2022-06-29 7:16 ` Geert Uytterhoeven
2022-06-29 23:37 ` Kuninori Morimoto
2022-06-30 9:30 ` Geert Uytterhoeven
2022-06-30 23:35 ` Kuninori Morimoto
2022-06-14 5:59 ` [PATCH v3 10/21] pinctrl: renesas: r8a779g0: add missing IRQx_A/IRQx_B Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 11/21] pinctrl: renesas: r8a779g0: add missing HSCIF3_A Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 5:59 ` Kuninori Morimoto [this message]
2022-06-17 15:18 ` [PATCH v3 12/21] pinctrl: renesas: r8a779g0: add missing HSCIF1_X Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 13/21] pinctrl: renesas: r8a779g0: add missing SCIF3 Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 14/21] pinctrl: renesas: r8a779g0: add missing SCIF1_X Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 15/21] pinctrl: renesas: r8a779g0: add missing CANFD5_B Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 16/21] pinctrl: renesas: r8a779g0: add missing TPU0TOx_A Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 17/21] pinctrl: renesas: r8a779g0: add missing FlaxRay Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 18/21] pinctrl: renesas: r8a779g0: add missing PWM Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 19/21] pinctrl: renesas: r8a779g0: add missing ERROROUTC_A Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 20/21] pinctrl: renesas: r8a779g0: add missing MODSELx for TSN0 Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
2022-06-14 6:01 ` [PATCH v3 21/21] pinctrl: renesas: r8a779g0: add missing MODSELx for AVBx Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
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