From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH 10/10] x86emul: correct AVX512_BF16 insn names in EVEX Disp8 test
Date: Mon, 3 Aug 2020 16:54:38 +0200 [thread overview]
Message-ID: <917b6766-ad0a-ba05-74bc-2f0ec7ba6157@suse.com> (raw)
In-Reply-To: <97ca3d9c-7540-c7b1-cf84-34c75c9127df@suse.com>
The leading 'v' ought to be omitted from the table entries.
Fixes: 7ff66809ccd5 ("x86emul: support AVX512_BF16 insns")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -551,9 +551,9 @@ static const struct test avx512_4vnniw_5
};
static const struct test avx512_bf16_all[] = {
- INSN(vcvtne2ps2bf16, f2, 0f38, 72, vl, d, vl),
- INSN(vcvtneps2bf16, f3, 0f38, 72, vl, d, vl),
- INSN(vdpbf16ps, f3, 0f38, 52, vl, d, vl),
+ INSN(cvtne2ps2bf16, f2, 0f38, 72, vl, d, vl),
+ INSN(cvtneps2bf16, f3, 0f38, 72, vl, d, vl),
+ INSN(dpbf16ps, f3, 0f38, 52, vl, d, vl),
};
static const struct test avx512_bitalg_all[] = {
next prev parent reply other threads:[~2020-08-03 14:54 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-03 14:47 [PATCH 00/10] x86emul: full coverage mem access / write testing Jan Beulich
2020-08-03 14:50 ` [PATCH 01/10] x86emul: adjustments to mem access / write logic testing Jan Beulich
2020-08-03 14:50 ` [PATCH 02/10] x86emul: extend decoding / mem access testing to FPU insns Jan Beulich
2020-08-03 14:50 ` [PATCH 03/10] x86emul: extend decoding / mem access testing to MMX / SSE insns Jan Beulich
2020-08-03 16:42 ` Andrew Cooper
2020-08-04 6:40 ` Jan Beulich
2020-08-03 14:51 ` [PATCH 04/10] x86emul: extend decoding / mem access testing to VEX-encoded insns Jan Beulich
2020-08-03 14:51 ` [PATCH 05/10] x86emul: extend decoding / mem access testing to XOP-encoded insns Jan Beulich
2020-08-03 14:52 ` [PATCH 06/10] x86emul: AVX512{F, BW} down conversion moves are memory writes Jan Beulich
2020-08-03 14:53 ` [PATCH 07/10] x86emul: AVX512F scatter insns " Jan Beulich
2020-08-03 14:53 ` [PATCH 08/10] x86emul: AVX512PF insns aren't memory accesses Jan Beulich
2020-08-03 14:54 ` [PATCH 09/10] x86emul: extend decoding / mem access testing to EVEX-encoded insns Jan Beulich
2020-08-03 14:54 ` Jan Beulich [this message]
2020-08-03 16:40 ` [PATCH 00/10] x86emul: full coverage mem access / write testing Andrew Cooper
2020-08-04 6:42 ` Jan Beulich
2020-08-04 7:38 ` Jan Beulich
2020-08-04 14:59 ` Andrew Cooper
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