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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH v4 5/8] x86: introduce x86_seg_sys
Date: Thu, 11 Jan 2024 10:01:13 +0100	[thread overview]
Message-ID: <9263a08c-8301-4c2d-a4da-801e203adb57@suse.com> (raw)
In-Reply-To: <9dd23064-c79e-4a50-9c71-c0e73b189944@suse.com>

To represent the USER-MSR bitmap access, a new segment type needs
introducing, behaving like x86_seg_none in terms of address treatment,
but behaving like a system segment for page walk purposes (implicit
supervisor-mode access).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
This feels a little fragile: Of course I did look through uses of the
enumerators, and I didn't find further places which would need
adjustment, but I'm not really sure I didn't miss any place.
---
v3: New.

--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -603,6 +603,7 @@ static int read(
     default:
         if ( !is_x86_user_segment(seg) )
             return X86EMUL_UNHANDLEABLE;
+    case x86_seg_sys:
     case x86_seg_none:
         bytes_read += bytes;
         break;
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -837,7 +837,7 @@ static int hvmemul_virtual_to_linear(
     int okay;
     unsigned long reps = 1;
 
-    if ( seg == x86_seg_none )
+    if ( seg == x86_seg_none || seg == x86_seg_sys )
     {
         *linear = offset;
         return X86EMUL_OKAY;
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2578,7 +2578,7 @@ bool hvm_vcpu_virtual_to_linear(
      * It is expected that the access rights of reg are suitable for seg (and
      * that this is enforced at the point that seg is loaded).
      */
-    ASSERT(seg < x86_seg_none);
+    ASSERT(seg < x86_seg_sys);
 
     /* However, check that insn fetches only ever specify CS. */
     ASSERT(access_type != hvm_access_insn_fetch || seg == x86_seg_cs);
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -749,6 +749,7 @@ static void cf_check svm_set_segment_reg
         vmcb->ldtr = *reg;
         break;
 
+    case x86_seg_sys:
     case x86_seg_none:
         ASSERT_UNREACHABLE();
         break;
--- a/xen/arch/x86/x86_emulate/x86_emulate.h
+++ b/xen/arch/x86/x86_emulate/x86_emulate.h
@@ -43,7 +43,8 @@ enum x86_segment {
     x86_seg_ldtr,
     x86_seg_gdtr,
     x86_seg_idtr,
-    /* No Segment: For accesses which are already linear. */
+    /* No Segment: For (system/normal) accesses which are already linear. */
+    x86_seg_sys,
     x86_seg_none
 };
 



  parent reply	other threads:[~2024-01-11  9:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-11  8:57 [PATCH v4 0/8] x86emul: misc additions Jan Beulich
2024-01-11  8:59 ` [PATCH v4 1/8] x86emul: support LKGS Jan Beulich
2024-01-11  8:59 ` [PATCH v4 2/8] x86emul: support CMPccXADD Jan Beulich
2024-01-11  9:00 ` [PATCH v4 3/8] VMX: tertiary execution control infrastructure Jan Beulich
2024-02-01 11:50   ` Roger Pau Monné
2024-02-01 12:09     ` Jan Beulich
2024-02-01 17:10       ` Roger Pau Monné
2024-02-05 13:37   ` [PATCH v4.5 " Jan Beulich
2024-02-06  9:28     ` Roger Pau Monné
2024-02-06  9:37       ` Jan Beulich
2024-01-11  9:00 ` [PATCH v4 4/8] x86emul+VMX: support {RD,WR}MSRLIST Jan Beulich
2024-01-11  9:01 ` Jan Beulich [this message]
2024-01-11  9:01 ` [PATCH v4 6/8] x86emul: support USER_MSR instructions Jan Beulich
2024-01-11  9:01 ` [PATCH v4 7/8] x86/cpu-policy: re-arrange no-VMX logic Jan Beulich
2024-01-11  9:02 ` [PATCH v4 8/8] VMX: support USER_MSR Jan Beulich

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