[PATCH] i915: Initialize panel timing registers if VBIOS did not.

From: Bryan Freed <bfreed@chromium.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org,
	Mandeep Baines <msb@chromium.org>,
	Olof Johansson <olofj@chromium.org>
Subject: [PATCH] i915: Initialize panel timing registers if VBIOS did not.
Date: Thu, 7 Oct 2010 17:05:46 -0700	[thread overview]
Message-ID: <AANLkTimODmDBdYBc=yZqcemRoauOan_Ag7cqRo_V18-Z@mail.gmail.com> (raw)


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The time between start of the pixel clock and backlight enable is a basic
panel timing constraint.  If the Panel Power On/Off registers are found
to be 0, assume we are booting without VBIOS initialization and set these
registers to something reasonable.

Change-Id: Ibed6cc10d46bf52fd92e0beb25ae3525b5eef99d
Signed-off-by: Bryan Freed <bfreed@chromium.org>
---
 drivers/gpu/drm/i915/intel_bios.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index ad030ff..943bbad 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -505,6 +505,15 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
  /* general features */
  dev_priv->int_tv_support = 1;
  dev_priv->int_crt_support = 1;
+
+ /* Set the Panel Power On/Off timings if uninitialized. */
+ if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
+ /* Set T2 to 40ms and T5 to 200ms */
+ I915_WRITE(PP_ON_DELAYS, 0x019007d0);
+
+ /* Set T3 to 35ms and Tx to 200ms */
+ I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
+ }
 }

 /**
-- 
1.7.1

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