All of lore.kernel.org
 help / color / mirror / Atom feed
From: Joel Stanley <joel@jms.id.au>
To: SoC Team <soc@kernel.org>
Cc: Andrew Jeffery <andrew@aj.id.au>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	 linux-aspeed <linux-aspeed@lists.ozlabs.org>
Subject: [GIT PULL v2] ARM: aspeed: devicetree changes for 5.18
Date: Mon, 28 Feb 2022 05:56:30 +0000	[thread overview]
Message-ID: <CACPK8XdUXy5cnEDKmNirtByNMBGCjXwZpdKqJ0ytc0f34vzbBA@mail.gmail.com> (raw)

Hello Soc maintainers,

Here are the aspeed bits for v5.18, with the tag on the correct branch
this time.

The following changes since commit e783362eb54cd99b2cac8b3a9aeac942e6f6ac07:

  Linux 5.17-rc1 (2022-01-23 10:12:53 +0200)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc.git
tags/aspeed-5.18-devicetree-2

for you to fetch changes up to 09603f805ab69dbf18015363c2a00001647e89f2:

  ARM: dts: aspeed: p10bmc: Enable ftrace in ramoops buffer
(2022-02-28 15:46:12 +1030)

----------------------------------------------------------------
ASPEED device tree updates for 5.18

 - New machines

  * Quanta S6Q AST2600 BMC
  * ASRock ROMED8HM3 AST2500 BMC, a half-width, single-socket Epyc
    server board

 - Facebook's Bletchley has a large update for production hardware

 - Ampere's Mt Jade has a number of updates

 - Small clenaups and additions for Everest, Rainier and Tacoma, and the
   flash layout

----------------------------------------------------------------
Andrew Geissler (2):
      ARM: dts: aspeed: everest: Label reset-cause-pinhole GPIO
      ARM: dts: aspeed: rainier: Label reset-cause-pinhole GPIO

Andrew Jeffery (1):
      ARM: dts: aspeed: tacoma: Clean up KCS nodes

Eddie James (3):
      ARM: dts: aspeed: rainier and everest: Enable UHCI
      ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO
      ARM: dts: aspeed: p10bmc: Enable ftrace in ramoops buffer

George Hung (1):
      ARM: dts: aspeed: Add device tree for Quanta S6Q BMC

Joel Stanley (3):
      ARM: dts: aspeed: rainier: Remove SPI NOR controllers
      ARM: dts: aspeed: rainer: Add RTC battery gpio name
      ARM: dts: aspeed: everest: Add RTC battery gpio name

Potin Lai (10):
      ARM: dts: aspeed: bletchley: Switch sled numbering to 1-based
      ARM: dts: aspeed: bletchley: Separate leds into multiple groups
      ARM: dts: aspeed: bletchley: Update gpio-line-names
      ARM: dts: aspeed: bletchley: Update fmc configurations
      ARM: dts: aspeed: bletchley: Switch to spi-gpio for spi2
      ARM: dts: aspeed: bletchley: Add interrupt support for sled io expander
      ARM: dts: aspeed: bletchley: Add shunt-resistor for ADM1278
      ARM: dts: aspeed: bletchley: Add INA230 sensor on each sled
      ARM: dts: aspeed: bletchley: Enable mdio3 bus
      ARM: dts: aspeed: bletchley: Cleanup redundant nodes

Quan Nguyen (5):
      ARM: dts: aspeed: mtjade: Enable secondary flash
      ARM: dts: aspeed: mtjade: Update rtc-battery-voltage-read-enable pin
      ARM: dts: aspeed: mtjade: Update host0-ready pin
      ARM: dts: aspeed: mtjade: Rename GPIO hog nodes to match schema.
      ARM: dts: aspeed: mtjade: Move all adc sensors into iio-hwmon node

Zev Weiss (2):
      ARM: dts: Fix OpenBMC flash layout label addresses
      ARM: dts: aspeed: Add ASRock ROMED8HM3 BMC

 arch/arm/boot/dts/Makefile                         |   2 +
 arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts     |  26 +-
 arch/arm/boot/dts/aspeed-bmc-asrock-romed8hm3.dts  | 259 +++++++++
 .../arm/boot/dts/aspeed-bmc-facebook-bletchley.dts | 320 +++++++----
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts       |  11 +-
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts       |  33 +-
 arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts        |  12 +-
 arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts        | 610 +++++++++++++++++++++
 arch/arm/boot/dts/openbmc-flash-layout-64.dtsi     |   2 +-
 arch/arm/boot/dts/openbmc-flash-layout.dtsi        |   2 +-
 10 files changed, 1112 insertions(+), 165 deletions(-)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-asrock-romed8hm3.dts
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts

WARNING: multiple messages have this Message-ID (diff)
From: Joel Stanley <joel@jms.id.au>
To: SoC Team <soc@kernel.org>
Cc: Andrew Jeffery <andrew@aj.id.au>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	 linux-aspeed <linux-aspeed@lists.ozlabs.org>
Subject: [GIT PULL v2] ARM: aspeed: devicetree changes for 5.18
Date: Mon, 28 Feb 2022 05:56:30 +0000	[thread overview]
Message-ID: <CACPK8XdUXy5cnEDKmNirtByNMBGCjXwZpdKqJ0ytc0f34vzbBA@mail.gmail.com> (raw)

Hello Soc maintainers,

Here are the aspeed bits for v5.18, with the tag on the correct branch
this time.

The following changes since commit e783362eb54cd99b2cac8b3a9aeac942e6f6ac07:

  Linux 5.17-rc1 (2022-01-23 10:12:53 +0200)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc.git
tags/aspeed-5.18-devicetree-2

for you to fetch changes up to 09603f805ab69dbf18015363c2a00001647e89f2:

  ARM: dts: aspeed: p10bmc: Enable ftrace in ramoops buffer
(2022-02-28 15:46:12 +1030)

----------------------------------------------------------------
ASPEED device tree updates for 5.18

 - New machines

  * Quanta S6Q AST2600 BMC
  * ASRock ROMED8HM3 AST2500 BMC, a half-width, single-socket Epyc
    server board

 - Facebook's Bletchley has a large update for production hardware

 - Ampere's Mt Jade has a number of updates

 - Small clenaups and additions for Everest, Rainier and Tacoma, and the
   flash layout

----------------------------------------------------------------
Andrew Geissler (2):
      ARM: dts: aspeed: everest: Label reset-cause-pinhole GPIO
      ARM: dts: aspeed: rainier: Label reset-cause-pinhole GPIO

Andrew Jeffery (1):
      ARM: dts: aspeed: tacoma: Clean up KCS nodes

Eddie James (3):
      ARM: dts: aspeed: rainier and everest: Enable UHCI
      ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO
      ARM: dts: aspeed: p10bmc: Enable ftrace in ramoops buffer

George Hung (1):
      ARM: dts: aspeed: Add device tree for Quanta S6Q BMC

Joel Stanley (3):
      ARM: dts: aspeed: rainier: Remove SPI NOR controllers
      ARM: dts: aspeed: rainer: Add RTC battery gpio name
      ARM: dts: aspeed: everest: Add RTC battery gpio name

Potin Lai (10):
      ARM: dts: aspeed: bletchley: Switch sled numbering to 1-based
      ARM: dts: aspeed: bletchley: Separate leds into multiple groups
      ARM: dts: aspeed: bletchley: Update gpio-line-names
      ARM: dts: aspeed: bletchley: Update fmc configurations
      ARM: dts: aspeed: bletchley: Switch to spi-gpio for spi2
      ARM: dts: aspeed: bletchley: Add interrupt support for sled io expander
      ARM: dts: aspeed: bletchley: Add shunt-resistor for ADM1278
      ARM: dts: aspeed: bletchley: Add INA230 sensor on each sled
      ARM: dts: aspeed: bletchley: Enable mdio3 bus
      ARM: dts: aspeed: bletchley: Cleanup redundant nodes

Quan Nguyen (5):
      ARM: dts: aspeed: mtjade: Enable secondary flash
      ARM: dts: aspeed: mtjade: Update rtc-battery-voltage-read-enable pin
      ARM: dts: aspeed: mtjade: Update host0-ready pin
      ARM: dts: aspeed: mtjade: Rename GPIO hog nodes to match schema.
      ARM: dts: aspeed: mtjade: Move all adc sensors into iio-hwmon node

Zev Weiss (2):
      ARM: dts: Fix OpenBMC flash layout label addresses
      ARM: dts: aspeed: Add ASRock ROMED8HM3 BMC

 arch/arm/boot/dts/Makefile                         |   2 +
 arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts     |  26 +-
 arch/arm/boot/dts/aspeed-bmc-asrock-romed8hm3.dts  | 259 +++++++++
 .../arm/boot/dts/aspeed-bmc-facebook-bletchley.dts | 320 +++++++----
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts       |  11 +-
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts       |  33 +-
 arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts        |  12 +-
 arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts        | 610 +++++++++++++++++++++
 arch/arm/boot/dts/openbmc-flash-layout-64.dtsi     |   2 +-
 arch/arm/boot/dts/openbmc-flash-layout.dtsi        |   2 +-
 10 files changed, 1112 insertions(+), 165 deletions(-)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-asrock-romed8hm3.dts
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

             reply	other threads:[~2022-02-28  5:56 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-28  5:56 Joel Stanley [this message]
2022-02-28  5:56 ` [GIT PULL v2] ARM: aspeed: devicetree changes for 5.18 Joel Stanley
2022-02-28 15:00 ` patchwork-bot+linux-soc

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CACPK8XdUXy5cnEDKmNirtByNMBGCjXwZpdKqJ0ytc0f34vzbBA@mail.gmail.com \
    --to=joel@jms.id.au \
    --cc=andrew@aj.id.au \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-aspeed@lists.ozlabs.org \
    --cc=soc@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.