From: "Sarvela, Tomi P" <tomi.p.sarvela@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Nikula, Jani" <jani.nikula@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/fbc: Parametrize FBC register offsets
Date: Wed, 15 Dec 2021 09:05:03 +0000 [thread overview]
Message-ID: <CO6PR11MB563679A612675BBBBAEBF307DE769@CO6PR11MB5636.namprd11.prod.outlook.com> (raw)
In-Reply-To: <YbjT/f9276cVmgDE@intel.com>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On Tue, Dec 14, 2021 at 06:25:43PM +0200, Ville Syrjälä wrote:
> > On Mon, Dec 13, 2021 at 09:54:04PM +0200, Jani Nikula wrote:
> > > On Mon, 13 Dec 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > >
> > > This one is only used in gvt, anyway. And that actually makes me wonder
> > > if this should be breaking the build. Does CI not have gvt enabled?
> >
> > Hmm. I thought it was enabled in CI, but maybe not. I've often broken
> > gvt with register define changes but I've always caught it before
> > pushing. I think I have gvt enabled in my "make sure all commits build
> > before I push" test config, so maybe that's where I caught most of them.
> >
> > Tomi, can we enable gvt in ci builds to make sure it at least still
> > builds?
>
> Actually cc Tomi..
GVT-d is enabled and tested by fi-bdw-gvtdvm.
Tomi
next prev parent reply other threads:[~2021-12-15 9:05 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-13 13:44 [Intel-gfx] [PATCH v2 0/4] drm/i915/fbc: More multi-FBC refactoring Ville Syrjala
2021-12-13 13:44 ` [Intel-gfx] [PATCH v2 1/4] drm/i915/fbc: Parametrize FBC register offsets Ville Syrjala
2021-12-13 19:54 ` Jani Nikula
2021-12-14 16:25 ` Ville Syrjälä
2021-12-14 17:27 ` Ville Syrjälä
2021-12-15 9:05 ` Sarvela, Tomi P [this message]
2021-12-15 13:25 ` Ville Syrjälä
2021-12-15 13:30 ` Sarvela, Tomi P
2021-12-15 14:11 ` Sarvela, Tomi P
2021-12-14 18:34 ` Jani Nikula
2021-12-14 18:46 ` [Intel-gfx] [PATCH v3 1/5] " Ville Syrjala
2021-12-13 13:44 ` [Intel-gfx] [PATCH v2 2/4] drm/i915/fbc: Loop through FBC instances in various places Ville Syrjala
2021-12-13 13:44 ` [Intel-gfx] [PATCH v2 3/4] drm/i915/fbc: Introduce device info fbc_mask Ville Syrjala
2021-12-13 13:44 ` [Intel-gfx] [PATCH v2 4/4] drm/i915/fbc: Register per-crtc debugfs files Ville Syrjala
2021-12-13 14:01 ` Jani Nikula
2021-12-13 15:04 ` Ville Syrjälä
2021-12-13 15:14 ` [Intel-gfx] [PATCH v3 " Ville Syrjala
2021-12-13 19:09 ` Jani Nikula
2021-12-14 18:44 ` Ville Syrjälä
2021-12-19 1:00 ` Nathan Chancellor
2021-12-21 16:05 ` Ville Syrjälä
2021-12-21 16:48 ` Nathan Chancellor
2021-12-13 18:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: More multi-FBC refactoring (rev3) Patchwork
2021-12-13 18:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-12-13 18:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-14 0:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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