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From: "Wang, Wenchao" <wenchao.wang@intel.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: haxm-team <haxm-team@intel.com>
Subject: [PATCH] target/i386/hax: Add XCR0 support
Date: Fri, 25 Nov 2022 12:18:09 +0000	[thread overview]
Message-ID: <DM6PR11MB40909B4A33D66A3100F6D219870E9@DM6PR11MB4090.namprd11.prod.outlook.com> (raw)


[-- Attachment #1.1: Type: text/plain, Size: 1164 bytes --]

Hi, maintainers,

As HAXM v7.8.0 is released and it added XCR0 support, could you help to merge this patch to add corresponding support into HAX user space of QEMU? The patch has been included in the attachment. Thanks.


Best Regards,
Wenchao


From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 2001
From: Wenchao Wang <wenchao.wang@intel.com>
Date: Fri, 25 Nov 2022 18:37:34 +0800
Subject: [PATCH] target/i386/hax: Add XCR0 support

Introduce extended control register XCR0 to support XSAVE feature set.

Note: This change requires at least HAXM v7.8.0 to support.

Reviewed-by: Hang Yuan <hang.yuan@intel.com>
Signed-off-by: Wenchao Wang <wenchao.wang@intel.com>
---
target/i386/hax/hax-interface.h | 2 ++
1 file changed, 2 insertions(+)

diff --git a/target/i386/hax/hax-interface.h b/target/i386/hax/hax-interface.h
index 537ae084e9..1d13bb2380 100644
--- a/target/i386/hax/hax-interface.h
+++ b/target/i386/hax/hax-interface.h
@@ -201,6 +201,8 @@ struct vcpu_state_t {
     uint64_t _cr3;
     uint64_t _cr4;
+    uint64_t _xcr0;
+
     uint64_t _dr0;
     uint64_t _dr1;
     uint64_t _dr2;
--
2.17.1


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[-- Attachment #2: 0001-target-i386-hax-Add-XCR0-support.patch --]
[-- Type: application/octet-stream, Size: 884 bytes --]

From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 2001
From: Wenchao Wang <wenchao.wang@intel.com>
Date: Fri, 25 Nov 2022 18:37:34 +0800
Subject: [PATCH] target/i386/hax: Add XCR0 support

Introduce extended control register XCR0 to support XSAVE feature set.

Note: This change requires at least HAXM v7.8.0 to support.

Reviewed-by: Hang Yuan <hang.yuan@intel.com>
Signed-off-by: Wenchao Wang <wenchao.wang@intel.com>
---
 target/i386/hax/hax-interface.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/i386/hax/hax-interface.h b/target/i386/hax/hax-interface.h
index 537ae084e9..1d13bb2380 100644
--- a/target/i386/hax/hax-interface.h
+++ b/target/i386/hax/hax-interface.h
@@ -201,6 +201,8 @@ struct vcpu_state_t {
     uint64_t _cr3;
     uint64_t _cr4;
 
+    uint64_t _xcr0;
+
     uint64_t _dr0;
     uint64_t _dr1;
     uint64_t _dr2;
-- 
2.17.1


             reply	other threads:[~2022-11-25 12:19 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-25 12:18 Wang, Wenchao [this message]
2022-11-25 13:37 ` [PATCH] target/i386/hax: Add XCR0 support Philippe Mathieu-Daudé
2022-11-28  8:10   ` Wang, Wenchao
2022-12-27 15:13     ` Paolo Bonzini
2022-12-28  2:55       ` Wang, Wenchao
2022-12-28  8:23         ` Paolo Bonzini
2022-12-28  8:54           ` Wang, Wenchao
2023-01-10  9:30           ` Wang, Wenchao
2022-12-28  3:28       ` Wang, Wenchao
2022-12-05  8:35   ` Wang, Wenchao
2022-12-05  9:05     ` Philippe Mathieu-Daudé
2022-12-05  9:10       ` Wang, Wenchao
2022-12-08  8:22       ` Wang, Wenchao
2022-12-19  9:01       ` Wang, Wenchao
2022-12-19  9:09         ` Philippe Mathieu-Daudé
2022-12-19  9:19           ` Wang, Wenchao
2022-12-27  9:15           ` Wang, Wenchao
2022-12-14  9:15 Wang, Wenchao
2022-12-14  9:39 ` Thomas Huth
2022-12-15  9:45   ` Wang, Wenchao
2022-12-15 10:26     ` Peter Maydell
2022-12-16  8:47       ` Wang, Wenchao

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