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From: Yonglin Tan <yonglin.tan@outlook.com>
To: mani@kernel.org, hemantk@codeaurora.org
Cc: mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Yonglin Tan <yonglin.tan@outlook.com>,
	stable@vger.kernel.org
Subject: [PATCH] bus: mhi: pci_generic: Add mru_default for Quectel EM1xx series
Date: Wed,  9 Feb 2022 21:57:52 +0800	[thread overview]
Message-ID: <MEYP282MB2374EE345DADDB591AFDA6AFFD2E9@MEYP282MB2374.AUSP282.PROD.OUTLOOK.COM> (raw)

For default mechanism, the driver uses default MRU 3500 if mru_default
is not initialized. The Qualcomm configured the MRU size to 32768 in the
WWAN device FW. So, we align the driver setting with Qualcomm FW setting.

Fixes: ac4bf60bbaa0 ("bus: mhi: pci_generic: Introduce quectel EM1XXGR-L support")
Cc: stable@vger.kernel.org
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Yonglin Tan <yonglin.tan@outlook.com>
---
 drivers/bus/mhi/pci_generic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
index b79895810c52..9527b7d63840 100644
--- a/drivers/bus/mhi/pci_generic.c
+++ b/drivers/bus/mhi/pci_generic.c
@@ -327,6 +327,7 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {
 	.config = &modem_quectel_em1xx_config,
 	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
 	.dma_data_width = 32,
+	.mru_default = 32768,
 	.sideband_wake = true,
 };
 
-- 
2.7.4


             reply	other threads:[~2022-02-09 13:59 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-09 13:57 Yonglin Tan [this message]
2022-02-10  4:19 ` [PATCH] bus: mhi: pci_generic: Add mru_default for Quectel EM1xx series Manivannan Sadhasivam
  -- strict thread matches above, loose matches on Subject: below --
2022-02-07  9:44 Yonglin Tan

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