From: Hou Weiying <weiying_hou@outlook.com> To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, Hongzheng-Li <Ethan.Lee.QNL@gmail.com>, Alistair.Francis@wdc.com, Myriad-Dreamin <camiyoru@gmail.com>, palmer@dabbelt.com Subject: [PATCH 1/4] Define ePMP mseccfg Date: Sat, 8 Aug 2020 16:56:53 +0800 [thread overview] Message-ID: <SG2PR02MB2634F136E13C28B7640BB0EE93460@SG2PR02MB2634.apcprd02.prod.outlook.com> (raw) In-Reply-To: <20200808085656.28692-1-weiying_hou@outlook.com> Currently using 0x390 and 0x391 for x-epmp (experimental). This may change in the future spec. Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com> Signed-off-by: Hou Weiying <weiying_hou@outlook.com> Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com> --- target/riscv/cpu_bits.h | 3 +++ target/riscv/gdbstub.c | 2 ++ 2 files changed, 5 insertions(+) diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 7f64ee1174..9a8a6be534 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -214,6 +214,9 @@ #define CSR_MTINST 0x34a #define CSR_MTVAL2 0x34b +/* Enhanced PMP */ +#define CSR_MSECCFG 0x390 +#define CSR_MSECCFGH 0x391 /* Physical Memory Protection */ #define CSR_PMPCFG0 0x3a0 #define CSR_PMPCFG1 0x3a1 diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index eba12a86f2..de5551604a 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -132,6 +132,8 @@ static int csr_register_map[] = { CSR_MIP, CSR_MTINST, CSR_MTVAL2, + CSR_MSECCFG, + CSR_MSECCFGH, CSR_PMPCFG0, CSR_PMPCFG1, CSR_PMPCFG2, -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Hou Weiying <weiying_hou@outlook.com> To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: palmer@dabbelt.com, Alistair.Francis@wdc.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, Hongzheng-Li <Ethan.Lee.QNL@gmail.com>, Myriad-Dreamin <camiyoru@gmail.com> Subject: [PATCH 1/4] Define ePMP mseccfg Date: Sat, 8 Aug 2020 16:56:53 +0800 [thread overview] Message-ID: <SG2PR02MB2634F136E13C28B7640BB0EE93460@SG2PR02MB2634.apcprd02.prod.outlook.com> (raw) In-Reply-To: <20200808085656.28692-1-weiying_hou@outlook.com> Currently using 0x390 and 0x391 for x-epmp (experimental). This may change in the future spec. Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com> Signed-off-by: Hou Weiying <weiying_hou@outlook.com> Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com> --- target/riscv/cpu_bits.h | 3 +++ target/riscv/gdbstub.c | 2 ++ 2 files changed, 5 insertions(+) diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 7f64ee1174..9a8a6be534 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -214,6 +214,9 @@ #define CSR_MTINST 0x34a #define CSR_MTVAL2 0x34b +/* Enhanced PMP */ +#define CSR_MSECCFG 0x390 +#define CSR_MSECCFGH 0x391 /* Physical Memory Protection */ #define CSR_PMPCFG0 0x3a0 #define CSR_PMPCFG1 0x3a1 diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index eba12a86f2..de5551604a 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -132,6 +132,8 @@ static int csr_register_map[] = { CSR_MIP, CSR_MTINST, CSR_MTVAL2, + CSR_MSECCFG, + CSR_MSECCFGH, CSR_PMPCFG0, CSR_PMPCFG1, CSR_PMPCFG2, -- 2.20.1
next parent reply other threads:[~2020-08-08 13:06 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <20200808085656.28692-1-weiying_hou@outlook.com> 2020-08-08 8:56 ` Hou Weiying [this message] 2020-08-08 8:56 ` [PATCH 1/4] Define ePMP mseccfg Hou Weiying 2020-08-08 8:56 ` [PATCH 2/4] Implementation of enhanced PMP(ePMP) support Hou Weiying 2020-08-08 8:56 ` Hou Weiying 2020-08-08 8:56 ` [PATCH 3/4] Add ePMP CSR accesses Hou Weiying 2020-08-08 8:56 ` Hou Weiying 2020-08-08 8:56 ` [PATCH 4/4] Add a config option for ePMP Hou Weiying 2020-08-08 8:56 ` Hou Weiying 2020-08-08 9:09 [PATCH 0/4] riscv: Add enhanced PMP support Hongzheng-Li 2020-08-08 9:09 ` [PATCH 1/4] Define ePMP mseccfg Hongzheng-Li 2020-08-08 9:09 ` Hongzheng-Li [not found] <20200808052031.19523-1-weiying_hou@outlook.com> 2020-08-08 5:20 ` Hou Weiying 2020-08-08 5:20 ` Hou Weiying
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