From: Conor Dooley <conor@kernel.org> To: arnd@arndb.de Cc: conor@kernel.org, palmer@dabbelt.com, linux-riscv@lists.infradead.org, soc@kernel.org Subject: [GIT PULL] RISC-V SoC drivers for v6.3 Date: Thu, 26 Jan 2023 18:57:38 +0000 [thread overview] Message-ID: <Y9LNIm9pkr+Owv/e@spud> (raw) [-- Attachment #1: Type: text/plain, Size: 2636 bytes --] Hey Arnd, I'm sending this one perhaps earlier than needed given there's going to be -rc8 this time around, just in case something about the PMU driver isn't to your liking. It'd be nice if there was a subsystem for these power management units as I wasn't sure if the API usage was correct. Heiko, who has experience from the rockchip driver, reviewed it, so I am happy with that. Thanks, Conor. The following changes since commit 1b929c02afd37871d5afb9d498426f83432e71c2: Linux 6.2-rc1 (2022-12-25 13:41:39 -0800) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-soc-for-v6.3-mw0 for you to fetch changes up to f3460326e38d6a084fb5b3348125a802567a3690: Merge patch series "JH7110 PMU Support" (2023-01-20 21:57:00 +0000) ---------------------------------------------------------------- RISC-V SoC drivers for v6.3-mw0 It's all StarFive stuff this time: Their new JH7110 SoC uses a SiFive core complex, and therefore a SiFive cache controller too. That needed a compatible added to both the binding and driver. The JH7110 also has power domains, which are supported by a new driver and a corresponding dt-binding. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> ---------------------------------------------------------------- Conor Dooley (1): Merge patch series "JH7110 PMU Support" Emil Renner Berthing (2): dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC soc: sifive: ccache: Add StarFive JH7110 support Walker Chen (2): dt-bindings: power: Add starfive,jh7110-pmu soc: starfive: Add StarFive JH71XX pmu driver .../bindings/power/starfive,jh7110-pmu.yaml | 45 +++ .../devicetree/bindings/riscv/sifive,ccache0.yaml | 9 +- MAINTAINERS | 13 + drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 3 +- drivers/soc/sifive/Kconfig | 2 +- drivers/soc/starfive/Kconfig | 12 + drivers/soc/starfive/Makefile | 3 + drivers/soc/starfive/jh71xx_pmu.c | 383 +++++++++++++++++++++ include/dt-bindings/power/starfive,jh7110-pmu.h | 17 + 10 files changed, 485 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml create mode 100644 drivers/soc/starfive/Kconfig create mode 100644 drivers/soc/starfive/Makefile create mode 100644 drivers/soc/starfive/jh71xx_pmu.c create mode 100644 include/dt-bindings/power/starfive,jh7110-pmu.h [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org> To: arnd@arndb.de Cc: conor@kernel.org, palmer@dabbelt.com, linux-riscv@lists.infradead.org, soc@kernel.org Subject: [GIT PULL] RISC-V SoC drivers for v6.3 Date: Thu, 26 Jan 2023 18:57:38 +0000 [thread overview] Message-ID: <Y9LNIm9pkr+Owv/e@spud> (raw) [-- Attachment #1.1: Type: text/plain, Size: 2636 bytes --] Hey Arnd, I'm sending this one perhaps earlier than needed given there's going to be -rc8 this time around, just in case something about the PMU driver isn't to your liking. It'd be nice if there was a subsystem for these power management units as I wasn't sure if the API usage was correct. Heiko, who has experience from the rockchip driver, reviewed it, so I am happy with that. Thanks, Conor. The following changes since commit 1b929c02afd37871d5afb9d498426f83432e71c2: Linux 6.2-rc1 (2022-12-25 13:41:39 -0800) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-soc-for-v6.3-mw0 for you to fetch changes up to f3460326e38d6a084fb5b3348125a802567a3690: Merge patch series "JH7110 PMU Support" (2023-01-20 21:57:00 +0000) ---------------------------------------------------------------- RISC-V SoC drivers for v6.3-mw0 It's all StarFive stuff this time: Their new JH7110 SoC uses a SiFive core complex, and therefore a SiFive cache controller too. That needed a compatible added to both the binding and driver. The JH7110 also has power domains, which are supported by a new driver and a corresponding dt-binding. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> ---------------------------------------------------------------- Conor Dooley (1): Merge patch series "JH7110 PMU Support" Emil Renner Berthing (2): dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC soc: sifive: ccache: Add StarFive JH7110 support Walker Chen (2): dt-bindings: power: Add starfive,jh7110-pmu soc: starfive: Add StarFive JH71XX pmu driver .../bindings/power/starfive,jh7110-pmu.yaml | 45 +++ .../devicetree/bindings/riscv/sifive,ccache0.yaml | 9 +- MAINTAINERS | 13 + drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 3 +- drivers/soc/sifive/Kconfig | 2 +- drivers/soc/starfive/Kconfig | 12 + drivers/soc/starfive/Makefile | 3 + drivers/soc/starfive/jh71xx_pmu.c | 383 +++++++++++++++++++++ include/dt-bindings/power/starfive,jh7110-pmu.h | 17 + 10 files changed, 485 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml create mode 100644 drivers/soc/starfive/Kconfig create mode 100644 drivers/soc/starfive/Makefile create mode 100644 drivers/soc/starfive/jh71xx_pmu.c create mode 100644 include/dt-bindings/power/starfive,jh7110-pmu.h [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2023-01-26 18:57 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-26 18:57 Conor Dooley [this message] 2023-01-26 18:57 ` [GIT PULL] RISC-V SoC drivers for v6.3 Conor Dooley 2023-01-30 22:31 ` patchwork-bot+linux-soc
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