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From: Eric Biggers <ebiggers@kernel.org>
To: Nathan Huckleberry <nhuck@google.com>
Cc: linux-crypto@vger.kernel.org,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	linux-arm-kernel@lists.infradead.org,
	Paul Crowley <paulcrowley@google.com>,
	Sami Tolvanen <samitolvanen@google.com>,
	Ard Biesheuvel <ardb@kernel.org>
Subject: Re: [RFC PATCH v2 6/7] crypto: x86/polyval: Add PCLMULQDQ accelerated implementation of POLYVAL
Date: Fri, 18 Feb 2022 16:54:12 -0800	[thread overview]
Message-ID: <YhA/tAaDi/3e35Q1@sol.localdomain> (raw)
In-Reply-To: <YhA7Ej8UfyCwkTNa@sol.localdomain>

On Fri, Feb 18, 2022 at 04:34:28PM -0800, Eric Biggers wrote:
> > +.macro schoolbook1_iteration i xor_sum
> > +	.set i, \i
> > +	.set xor_sum, \xor_sum
> > +	movups (16*i)(OP1), %xmm0
> > +	.if(i == 0 && xor_sum == 1)
> > +		pxor SUM, %xmm0
> > +	.endif
> > +	vpclmulqdq $0x01, (16*i)(OP2), %xmm0, %xmm1
> > +	vpxor %xmm1, MI, MI
> > +	vpclmulqdq $0x00, (16*i)(OP2), %xmm0, %xmm2
> > +	vpxor %xmm2, LO, LO
> > +	vpclmulqdq $0x11, (16*i)(OP2), %xmm0, %xmm3
> > +	vpxor %xmm3, HI, HI
> > +	vpclmulqdq $0x10, (16*i)(OP2), %xmm0, %xmm4
> > +	vpxor %xmm4, MI, MI
> 
> Perhaps the above multiplications and XORs should be reordered slightly so that
> each XOR doesn't depend on the previous instruction?  A good ordering might be:
> 
> 	vpclmulqdq $0x01, (16*\i)(OP2), %xmm0, %xmm1
> 	vpclmulqdq $0x10, (16*\i)(OP2), %xmm0, %xmm2
> 	vpclmulqdq $0x00, (16*\i)(OP2), %xmm0, %xmm3
> 	vpclmulqdq $0x11, (16*\i)(OP2), %xmm0, %xmm4
> 	vpxor %xmm1, MI, MI
> 	vpxor %xmm3, LO, LO
> 	vpxor %xmm4, HI, HI
> 	vpxor %xmm2, MI, MI
> 
> With that, no instruction would depend on either of the previous two
> instructions.
> 
> This might be more important in the ARM64 version than the x86_64 version, as
> x86_64 CPUs are pretty aggressive about internally reordering instructions.  But
> it's something to consider in both versions.
> 
> Likewise in schoolbook1_noload.

Or slightly better:

        vpclmulqdq $0x01, (16*\i)(OP2), %xmm0, %xmm2
        vpclmulqdq $0x00, (16*\i)(OP2), %xmm0, %xmm1
        vpclmulqdq $0x10, (16*\i)(OP2), %xmm0, %xmm3
        vpclmulqdq $0x11, (16*\i)(OP2), %xmm0, %xmm4
        vpxor %xmm2, MI, MI
        vpxor %xmm1, LO, LO
        vpxor %xmm4, HI, HI
        vpxor %xmm3, MI, MI

- Eric

WARNING: multiple messages have this Message-ID (diff)
From: Eric Biggers <ebiggers@kernel.org>
To: Nathan Huckleberry <nhuck@google.com>
Cc: linux-crypto@vger.kernel.org,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	linux-arm-kernel@lists.infradead.org,
	Paul Crowley <paulcrowley@google.com>,
	Sami Tolvanen <samitolvanen@google.com>,
	Ard Biesheuvel <ardb@kernel.org>
Subject: Re: [RFC PATCH v2 6/7] crypto: x86/polyval: Add PCLMULQDQ accelerated implementation of POLYVAL
Date: Fri, 18 Feb 2022 16:54:12 -0800	[thread overview]
Message-ID: <YhA/tAaDi/3e35Q1@sol.localdomain> (raw)
In-Reply-To: <YhA7Ej8UfyCwkTNa@sol.localdomain>

On Fri, Feb 18, 2022 at 04:34:28PM -0800, Eric Biggers wrote:
> > +.macro schoolbook1_iteration i xor_sum
> > +	.set i, \i
> > +	.set xor_sum, \xor_sum
> > +	movups (16*i)(OP1), %xmm0
> > +	.if(i == 0 && xor_sum == 1)
> > +		pxor SUM, %xmm0
> > +	.endif
> > +	vpclmulqdq $0x01, (16*i)(OP2), %xmm0, %xmm1
> > +	vpxor %xmm1, MI, MI
> > +	vpclmulqdq $0x00, (16*i)(OP2), %xmm0, %xmm2
> > +	vpxor %xmm2, LO, LO
> > +	vpclmulqdq $0x11, (16*i)(OP2), %xmm0, %xmm3
> > +	vpxor %xmm3, HI, HI
> > +	vpclmulqdq $0x10, (16*i)(OP2), %xmm0, %xmm4
> > +	vpxor %xmm4, MI, MI
> 
> Perhaps the above multiplications and XORs should be reordered slightly so that
> each XOR doesn't depend on the previous instruction?  A good ordering might be:
> 
> 	vpclmulqdq $0x01, (16*\i)(OP2), %xmm0, %xmm1
> 	vpclmulqdq $0x10, (16*\i)(OP2), %xmm0, %xmm2
> 	vpclmulqdq $0x00, (16*\i)(OP2), %xmm0, %xmm3
> 	vpclmulqdq $0x11, (16*\i)(OP2), %xmm0, %xmm4
> 	vpxor %xmm1, MI, MI
> 	vpxor %xmm3, LO, LO
> 	vpxor %xmm4, HI, HI
> 	vpxor %xmm2, MI, MI
> 
> With that, no instruction would depend on either of the previous two
> instructions.
> 
> This might be more important in the ARM64 version than the x86_64 version, as
> x86_64 CPUs are pretty aggressive about internally reordering instructions.  But
> it's something to consider in both versions.
> 
> Likewise in schoolbook1_noload.

Or slightly better:

        vpclmulqdq $0x01, (16*\i)(OP2), %xmm0, %xmm2
        vpclmulqdq $0x00, (16*\i)(OP2), %xmm0, %xmm1
        vpclmulqdq $0x10, (16*\i)(OP2), %xmm0, %xmm3
        vpclmulqdq $0x11, (16*\i)(OP2), %xmm0, %xmm4
        vpxor %xmm2, MI, MI
        vpxor %xmm1, LO, LO
        vpxor %xmm4, HI, HI
        vpxor %xmm3, MI, MI

- Eric

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  reply	other threads:[~2022-02-19  0:54 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-10 23:28 [RFC PATCH v2 0/7] crypto: HCTR2 support Nathan Huckleberry
2022-02-10 23:28 ` Nathan Huckleberry
2022-02-10 23:28 ` [RFC PATCH v2 1/7] crypto: xctr - Add XCTR support Nathan Huckleberry
2022-02-10 23:28   ` Nathan Huckleberry
2022-02-16 23:00   ` Eric Biggers
2022-02-16 23:00     ` Eric Biggers
2022-02-17  7:07     ` Arnd Bergmann
2022-02-17  7:07       ` Arnd Bergmann
2022-02-10 23:28 ` [RFC PATCH v2 2/7] crypto: polyval - Add POLYVAL support Nathan Huckleberry
2022-02-10 23:28   ` Nathan Huckleberry
2022-02-16 23:16   ` Eric Biggers
2022-02-16 23:16     ` Eric Biggers
2022-02-10 23:28 ` [RFC PATCH v2 3/7] crypto: hctr2 - Add HCTR2 support Nathan Huckleberry
2022-02-10 23:28   ` Nathan Huckleberry
2022-02-17  1:07   ` Eric Biggers
2022-02-17  1:07     ` Eric Biggers
2022-02-10 23:28 ` [RFC PATCH v2 4/7] crypto: x86/aesni-xctr: Add accelerated implementation of XCTR Nathan Huckleberry
2022-02-10 23:28   ` Nathan Huckleberry
2022-02-19  1:28   ` Eric Biggers
2022-02-19  1:28     ` Eric Biggers
2022-02-10 23:28 ` [RFC PATCH v2 5/7] crypto: arm64/aes-xctr: " Nathan Huckleberry
2022-02-10 23:28   ` Nathan Huckleberry
2022-02-11 11:48   ` Ard Biesheuvel
2022-02-11 11:48     ` Ard Biesheuvel
2022-02-11 20:30     ` Nathan Huckleberry
2022-02-11 20:30       ` Nathan Huckleberry
2022-02-12 10:08       ` Ard Biesheuvel
2022-02-12 10:08         ` Ard Biesheuvel
2022-02-10 23:28 ` [RFC PATCH v2 6/7] crypto: x86/polyval: Add PCLMULQDQ accelerated implementation of POLYVAL Nathan Huckleberry
2022-02-10 23:28   ` Nathan Huckleberry
2022-02-19  0:34   ` Eric Biggers
2022-02-19  0:34     ` Eric Biggers
2022-02-19  0:54     ` Eric Biggers [this message]
2022-02-19  0:54       ` Eric Biggers
2022-02-10 23:28 ` [RFC PATCH v2 7/7] crypto: arm64/polyval: Add PMULL " Nathan Huckleberry
2022-02-10 23:28   ` Nathan Huckleberry
2022-02-19  1:21   ` Eric Biggers
2022-02-19  1:21     ` Eric Biggers

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