From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, Nischal Varide <nischal.varide@intel.com>, dri-devel@lists.freedesktop.org Subject: [PATCH v3 1/9] drm/dp: add MSO related DPCD registers Date: Thu, 11 Feb 2021 16:52:11 +0200 [thread overview] Message-ID: <ab57627f373ec4a80494bb51ea51080810d9bfb0.1613054234.git.jani.nikula@intel.com> (raw) In-Reply-To: <cover.1613054234.git.jani.nikula@intel.com> Add DPCD register definitions for eDP 1.4 Multi-SST Operation. Cc: Nischal Varide <nischal.varide@intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- include/drm/drm_dp_helper.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index edffd1dcca3e..632ad7faa006 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1016,6 +1016,11 @@ struct drm_device; #define DP_EDP_REGIONAL_BACKLIGHT_BASE 0x740 /* eDP 1.4 */ #define DP_EDP_REGIONAL_BACKLIGHT_0 0x741 /* eDP 1.4 */ +#define DP_EDP_MSO_LINK_CAPABILITIES 0x7a4 /* eDP 1.4 */ +# define DP_EDP_MSO_NUMBER_OF_LINKS_MASK (7 << 0) +# define DP_EDP_MSO_NUMBER_OF_LINKS_SHIFT 0 +# define DP_EDP_MSO_INDEPENDENT_LINK_BIT (1 << 3) + /* Sideband MSG Buffers */ #define DP_SIDEBAND_MSG_DOWN_REQ_BASE 0x1000 /* 1.2 MST */ #define DP_SIDEBAND_MSG_UP_REP_BASE 0x1200 /* 1.2 MST */ -- 2.20.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, Nischal Varide <nischal.varide@intel.com>, dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers Date: Thu, 11 Feb 2021 16:52:11 +0200 [thread overview] Message-ID: <ab57627f373ec4a80494bb51ea51080810d9bfb0.1613054234.git.jani.nikula@intel.com> (raw) In-Reply-To: <cover.1613054234.git.jani.nikula@intel.com> Add DPCD register definitions for eDP 1.4 Multi-SST Operation. Cc: Nischal Varide <nischal.varide@intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- include/drm/drm_dp_helper.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index edffd1dcca3e..632ad7faa006 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1016,6 +1016,11 @@ struct drm_device; #define DP_EDP_REGIONAL_BACKLIGHT_BASE 0x740 /* eDP 1.4 */ #define DP_EDP_REGIONAL_BACKLIGHT_0 0x741 /* eDP 1.4 */ +#define DP_EDP_MSO_LINK_CAPABILITIES 0x7a4 /* eDP 1.4 */ +# define DP_EDP_MSO_NUMBER_OF_LINKS_MASK (7 << 0) +# define DP_EDP_MSO_NUMBER_OF_LINKS_SHIFT 0 +# define DP_EDP_MSO_INDEPENDENT_LINK_BIT (1 << 3) + /* Sideband MSG Buffers */ #define DP_SIDEBAND_MSG_DOWN_REQ_BASE 0x1000 /* 1.2 MST */ #define DP_SIDEBAND_MSG_UP_REP_BASE 0x1200 /* 1.2 MST */ -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-02-11 14:52 UTC|newest] Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-11 14:52 [Intel-gfx] [PATCH v3 0/9] drm/i915/edp: enable eDP Multi-SST Operation (MSO) Jani Nikula 2021-02-11 14:52 ` Jani Nikula [this message] 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers Jani Nikula 2021-02-22 5:25 ` Shankar, Uma 2021-02-22 5:25 ` Shankar, Uma 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 2/9] drm/i915/edp: reject modes with dimensions other than fixed mode Jani Nikula 2021-02-22 5:36 ` Shankar, Uma 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 3/9] drm/i915/edp: always add fixed mode to probed modes in ->get_modes() Jani Nikula 2021-02-22 5:50 ` Shankar, Uma 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 4/9] drm/i915/edp: read sink MSO configuration for eDP 1.4+ Jani Nikula 2021-02-22 5:57 ` Shankar, Uma 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 5/9] drm/i915/reg: add stream splitter configuration definitions Jani Nikula 2021-02-22 5:58 ` Shankar, Uma 2021-02-22 16:31 ` Jani Nikula 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout for platforms that support it Jani Nikula 2021-02-22 9:09 ` Shankar, Uma 2021-02-22 16:55 ` Jani Nikula 2021-02-22 18:11 ` Shankar, Uma 2021-03-02 10:25 ` Jani Nikula 2021-03-02 10:29 ` Shankar, Uma 2021-03-02 14:57 ` Ville Syrjälä 2021-03-02 17:20 ` Jani Nikula 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check Jani Nikula 2021-02-22 9:13 ` Shankar, Uma 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 8/9] drm/i915/edp: modify fixed and downclock modes for MSO Jani Nikula 2021-02-22 9:21 ` Shankar, Uma 2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 9/9] drm/i915/edp: enable eDP MSO during link training Jani Nikula 2021-02-22 10:06 ` Shankar, Uma 2021-02-11 15:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/edp: enable eDP Multi-SST Operation (MSO) Patchwork 2021-02-11 16:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-02-11 17:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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