From: "Michał Leszczyński" <michal.leszczynski@cert.pl>
To: xen-devel@lists.xenproject.org
Cc: luwei.kang@intel.com, "Wei Liu" <wl@xen.org>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Michal Leszczynski" <michal.leszczynski@cert.pl>,
"Jan Beulich" <jbeulich@suse.com>,
tamas.lengyel@intel.com, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH v6 02/11] x86/vmx: add Intel PT MSR definitions
Date: Tue, 7 Jul 2020 21:39:41 +0200 [thread overview]
Message-ID: <ba3de1d4cd926b16a297d90055a03fda0762c2b5.1594150543.git.michal.leszczynski@cert.pl> (raw)
In-Reply-To: <cover.1594150543.git.michal.leszczynski@cert.pl>
In-Reply-To: <cover.1594150543.git.michal.leszczynski@cert.pl>
From: Michal Leszczynski <michal.leszczynski@cert.pl>
Define constants related to Intel Processor Trace features.
Signed-off-by: Michal Leszczynski <michal.leszczynski@cert.pl>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
xen/include/asm-x86/msr-index.h | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 0fe98af923..4fd54fb5c9 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -72,7 +72,31 @@
#define MSR_RTIT_OUTPUT_BASE 0x00000560
#define MSR_RTIT_OUTPUT_MASK 0x00000561
#define MSR_RTIT_CTL 0x00000570
+#define RTIT_CTL_TRACE_EN (_AC(1, ULL) << 0)
+#define RTIT_CTL_CYC_EN (_AC(1, ULL) << 1)
+#define RTIT_CTL_OS (_AC(1, ULL) << 2)
+#define RTIT_CTL_USR (_AC(1, ULL) << 3)
+#define RTIT_CTL_PWR_EVT_EN (_AC(1, ULL) << 4)
+#define RTIT_CTL_FUP_ON_PTW (_AC(1, ULL) << 5)
+#define RTIT_CTL_FABRIC_EN (_AC(1, ULL) << 6)
+#define RTIT_CTL_CR3_FILTER (_AC(1, ULL) << 7)
+#define RTIT_CTL_TOPA (_AC(1, ULL) << 8)
+#define RTIT_CTL_MTC_EN (_AC(1, ULL) << 9)
+#define RTIT_CTL_TSC_EN (_AC(1, ULL) << 10)
+#define RTIT_CTL_DIS_RETC (_AC(1, ULL) << 11)
+#define RTIT_CTL_PTW_EN (_AC(1, ULL) << 12)
+#define RTIT_CTL_BRANCH_EN (_AC(1, ULL) << 13)
+#define RTIT_CTL_MTC_FREQ (_AC(0xf, ULL) << 14)
+#define RTIT_CTL_CYC_THRESH (_AC(0xf, ULL) << 19)
+#define RTIT_CTL_PSB_FREQ (_AC(0xf, ULL) << 24)
+#define RTIT_CTL_ADDR(n) (_AC(0xf, ULL) << (32 + 4 * (n)))
#define MSR_RTIT_STATUS 0x00000571
+#define RTIT_STATUS_FILTER_EN (_AC(1, ULL) << 0)
+#define RTIT_STATUS_CONTEXT_EN (_AC(1, ULL) << 1)
+#define RTIT_STATUS_TRIGGER_EN (_AC(1, ULL) << 2)
+#define RTIT_STATUS_ERROR (_AC(1, ULL) << 4)
+#define RTIT_STATUS_STOPPED (_AC(1, ULL) << 5)
+#define RTIT_STATUS_BYTECNT (_AC(0x1ffff, ULL) << 32)
#define MSR_RTIT_CR3_MATCH 0x00000572
#define MSR_RTIT_ADDR_A(n) (0x00000580 + (n) * 2)
#define MSR_RTIT_ADDR_B(n) (0x00000581 + (n) * 2)
--
2.17.1
next prev parent reply other threads:[~2020-07-07 19:40 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-07 19:39 [PATCH v6 00/11] Implement support for external IPT monitoring Michał Leszczyński
2020-07-07 19:39 ` [PATCH v6 01/11] memory: batch processing in acquire_resource() Michał Leszczyński
2020-07-15 9:36 ` Roger Pau Monné
2020-07-15 12:13 ` Jan Beulich
2020-07-16 8:14 ` Roger Pau Monné
2020-07-15 12:28 ` Jan Beulich
2020-07-17 14:16 ` Julien Grall
2020-07-07 19:39 ` Michał Leszczyński [this message]
2020-07-07 19:39 ` [PATCH v6 03/11] x86/vmx: add IPT cpu feature Michał Leszczyński
2020-07-15 10:02 ` Roger Pau Monné
2020-08-07 14:22 ` Jan Beulich
2020-07-07 19:39 ` [PATCH v6 04/11] common: add vmtrace_pt_size domain parameter Michał Leszczyński
2020-07-15 15:08 ` Roger Pau Monné
2020-08-07 14:29 ` Jan Beulich
2020-07-07 19:39 ` [PATCH v6 05/11] tools/libxl: add vmtrace_pt_size parameter Michał Leszczyński
2020-07-15 15:17 ` Roger Pau Monné
2020-07-07 19:39 ` [PATCH v6 06/11] x86/hvm: processor trace interface in HVM Michał Leszczyński
2020-07-15 15:43 ` Roger Pau Monné
2020-08-07 14:37 ` Jan Beulich
2020-07-07 19:39 ` [PATCH v6 07/11] x86/vmx: implement IPT in VMX Michał Leszczyński
2020-07-15 16:04 ` Roger Pau Monné
2020-08-07 15:00 ` Jan Beulich
2020-07-07 19:39 ` [PATCH v6 08/11] x86/mm: add vmtrace_buf resource type Michał Leszczyński
2020-07-15 17:20 ` Roger Pau Monné
2020-07-07 19:39 ` [PATCH v6 09/11] x86/domctl: add XEN_DOMCTL_vmtrace_op Michał Leszczyński
2020-07-15 17:32 ` Roger Pau Monné
2020-08-27 14:54 ` Jan Beulich
2020-07-07 19:39 ` [PATCH v6 10/11] tools/libxc: add xc_vmtrace_* functions Michał Leszczyński
2020-07-16 8:26 ` Roger Pau Monné
2020-07-07 19:39 ` [PATCH v6 11/11] tools/proctrace: add proctrace tool Michał Leszczyński
2020-07-16 8:42 ` Roger Pau Monné
2020-07-14 13:11 ` [PATCH v6 00/11] Implement support for external IPT monitoring Michał Leszczyński
2020-07-14 15:05 ` Roger Pau Monné
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ba3de1d4cd926b16a297d90055a03fda0762c2b5.1594150543.git.michal.leszczynski@cert.pl \
--to=michal.leszczynski@cert.pl \
--cc=andrew.cooper3@citrix.com \
--cc=jbeulich@suse.com \
--cc=luwei.kang@intel.com \
--cc=roger.pau@citrix.com \
--cc=tamas.lengyel@intel.com \
--cc=wl@xen.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.