From: Simon Horman <horms+renesas@verge.net.au> To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm <magnus.damm@gmail.com>, Geert Uytterhoeven <geert+renesas@glider.be>, Simon Horman <horms+renesas@verge.net.au> Subject: [PATCH 5/5] soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper Date: Thu, 30 Jun 2016 16:16:12 +0200 [thread overview] Message-ID: <ced42730d19dd140a76f86c3761f646b83a35d09.1467292648.git.horms+renesas@verge.net.au> (raw) In-Reply-To: <cover.1467292648.git.horms+renesas@verge.net.au> From: Geert Uytterhoeven <geert+renesas@glider.be> Align SYSC interrupt configuration in the legacy wrapper with the DT version: - Mask SYSC interrupt sources before enabling them (doesn't matter much as they're disabled at the GIC level anyway), - Make sure not to clear reserved SYSCIMR bits that were set before. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- drivers/soc/renesas/rcar-sysc.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 22f0d646225c..65c8e1eb90c0 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -402,12 +402,25 @@ early_initcall(rcar_sysc_pd_init); void __init rcar_sysc_init(phys_addr_t base, u32 syscier) { + u32 syscimr; + if (!rcar_sysc_pd_init()) return; rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); - /* enable all interrupt sources, but do not use interrupt handler */ + /* + * Mask all interrupt sources to prevent the CPU from receiving them. + * Make sure not to clear reserved bits that were set before. + */ + syscimr = ioread32(rcar_sysc_base + SYSCIMR); + syscimr |= syscier; + pr_debug("%s: syscimr = 0x%08x\n", __func__, syscimr); + iowrite32(syscimr, rcar_sysc_base + SYSCIMR); + + /* + * SYSC needs all interrupt sources enabled to control power. + */ + pr_debug("%s: syscier = 0x%08x\n", __func__, syscier); iowrite32(syscier, rcar_sysc_base + SYSCIER); - iowrite32(0, rcar_sysc_base + SYSCIMR); } -- 2.7.0.rc3.207.g0ac5344
WARNING: multiple messages have this Message-ID (diff)
From: horms+renesas@verge.net.au (Simon Horman) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/5] soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper Date: Thu, 30 Jun 2016 16:16:12 +0200 [thread overview] Message-ID: <ced42730d19dd140a76f86c3761f646b83a35d09.1467292648.git.horms+renesas@verge.net.au> (raw) In-Reply-To: <cover.1467292648.git.horms+renesas@verge.net.au> From: Geert Uytterhoeven <geert+renesas@glider.be> Align SYSC interrupt configuration in the legacy wrapper with the DT version: - Mask SYSC interrupt sources before enabling them (doesn't matter much as they're disabled at the GIC level anyway), - Make sure not to clear reserved SYSCIMR bits that were set before. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- drivers/soc/renesas/rcar-sysc.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 22f0d646225c..65c8e1eb90c0 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -402,12 +402,25 @@ early_initcall(rcar_sysc_pd_init); void __init rcar_sysc_init(phys_addr_t base, u32 syscier) { + u32 syscimr; + if (!rcar_sysc_pd_init()) return; rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); - /* enable all interrupt sources, but do not use interrupt handler */ + /* + * Mask all interrupt sources to prevent the CPU from receiving them. + * Make sure not to clear reserved bits that were set before. + */ + syscimr = ioread32(rcar_sysc_base + SYSCIMR); + syscimr |= syscier; + pr_debug("%s: syscimr = 0x%08x\n", __func__, syscimr); + iowrite32(syscimr, rcar_sysc_base + SYSCIMR); + + /* + * SYSC needs all interrupt sources enabled to control power. + */ + pr_debug("%s: syscier = 0x%08x\n", __func__, syscier); iowrite32(syscier, rcar_sysc_base + SYSCIER); - iowrite32(0, rcar_sysc_base + SYSCIMR); } -- 2.7.0.rc3.207.g0ac5344
next prev parent reply other threads:[~2016-06-30 14:17 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-30 14:16 [GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8 Simon Horman 2016-06-30 14:16 ` Simon Horman 2016-06-30 14:16 ` [PATCH 1/5] soc: renesas: rcar-sysc: add R8A7792 support Simon Horman 2016-06-30 14:16 ` Simon Horman 2016-06-30 14:16 ` [PATCH 2/5] soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init() Simon Horman 2016-06-30 14:16 ` Simon Horman 2016-06-30 14:16 ` [PATCH 3/5] soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains Simon Horman 2016-06-30 14:16 ` Simon Horman 2016-06-30 14:16 ` [PATCH 4/5] soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver Simon Horman 2016-06-30 14:16 ` Simon Horman 2016-06-30 14:16 ` Simon Horman [this message] 2016-06-30 14:16 ` [PATCH 5/5] soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper Simon Horman 2016-07-07 5:12 ` [GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8 Olof Johansson 2016-07-07 5:12 ` Olof Johansson
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