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From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: unlisted-recipients:; (no To-header on input)
Cc: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
	Binghui Wang <wangbinghui@hisilicon.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh@kernel.org>,
	Xiaowei Song <songxiaowei@hisilicon.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: [PATCH 11/13] pci: dwc: pcie-kirin: add support for clkreq GPIOs
Date: Tue,  2 Feb 2021 14:29:56 +0100	[thread overview]
Message-ID: <d6a54284f50b74dd3249e79b65e060d1982e7100.1612271903.git.mchehab+huawei@kernel.org> (raw)
In-Reply-To: <cover.1612271903.git.mchehab+huawei@kernel.org>

The PCI hardware on Hikey 970 also need to enable clock
lines for PCI bridge, Ethernet and M.2 connector.

Those should be enabled during PCI hardware power on logic.

Add support for them.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
 drivers/pci/controller/dwc/pcie-kirin.c | 77 +++++++++++--------------
 1 file changed, 34 insertions(+), 43 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-kirin.c b/drivers/pci/controller/dwc/pcie-kirin.c
index faf711366309..37b964386d21 100644
--- a/drivers/pci/controller/dwc/pcie-kirin.c
+++ b/drivers/pci/controller/dwc/pcie-kirin.c
@@ -140,6 +140,8 @@
 #define TIME_PHY_PD_MAX		11
 
 #define MAX_GPIO_RESETS		4
+#define MAX_GPIO_CLKREQ		3
+
 struct kirin_pcie {
 	struct dw_pcie	*pci;
 	void __iomem	*apb_base;
@@ -153,9 +155,11 @@ struct kirin_pcie {
 	struct clk	*pcie_aclk;
 	struct clk	*pcie_aux_clk;
 	int		n_gpio_resets;
-	int		gpio_id_clkreq[3];
+	int		n_gpio_clkreq;
 	int		gpio_id_reset[MAX_GPIO_RESETS];
 	const char	*reset_names[MAX_GPIO_RESETS];
+	int		gpio_id_clkreq[MAX_GPIO_CLKREQ];
+	const char	*clkreq_names[MAX_GPIO_CLKREQ];
 	u32		eye_param[5];
 };
 
@@ -345,6 +349,24 @@ static long kirin_common_pcie_get_resource(struct kirin_pcie *kirin_pcie,
 			return -ENOMEM;
 	}
 
+	kirin_pcie->n_gpio_clkreq = of_gpio_named_count(np, "clkreq-gpios");
+	if (kirin_pcie->n_gpio_clkreq > MAX_GPIO_CLKREQ) {
+		dev_err(dev, "Too many GPIO clock requests!\n");
+		return -EINVAL;
+	}
+	for (i = 0; i < kirin_pcie->n_gpio_clkreq; i++) {
+		kirin_pcie->gpio_id_clkreq[i] = of_get_named_gpio(dev->of_node,
+							    "clkreq-gpios", i);
+		if (kirin_pcie->gpio_id_clkreq[i] < 0)
+			return kirin_pcie->gpio_id_clkreq[i];
+
+		sprintf(name, "pcie_clkreq_%d", i);
+		kirin_pcie->clkreq_names[i] = devm_kstrdup_const(dev, name,
+								GFP_KERNEL);
+		if (!kirin_pcie->clkreq_names[i])
+			return -ENOMEM;
+	}
+
 	return 0;
 }
 
@@ -360,6 +382,12 @@ static int kirin_gpio_request(struct kirin_pcie *kirin_pcie,
 			return ret;
 	}
 
+	for (i = 0; i < kirin_pcie->n_gpio_clkreq; i++) {
+		ret = devm_gpio_request(dev, kirin_pcie->gpio_id_clkreq[i],
+					kirin_pcie->clkreq_names[i]);
+		if (ret)
+			return ret;
+	}
 
 	return ret;
 }
@@ -393,36 +421,6 @@ static long kirin970_pcie_get_resource(struct kirin_pcie *kirin_pcie,
 	if (ret)
 		return ret;
 
-	kirin_pcie->gpio_id_clkreq[0] = of_get_named_gpio(dev->of_node,
-						"eth,clkreq-gpios", 0);
-	if (kirin_pcie->gpio_id_clkreq[0] < 0)
-		return -ENODEV;
-
-	kirin_pcie->gpio_id_clkreq[1] = of_get_named_gpio(dev->of_node,
-						"m_2,clkreq-gpios", 0);
-	if (kirin_pcie->gpio_id_clkreq[1] < 0)
-		return -ENODEV;
-
-	kirin_pcie->gpio_id_clkreq[2] = of_get_named_gpio(dev->of_node,
-						"mini1,clkreq-gpios", 0);
-	if (kirin_pcie->gpio_id_clkreq[2] < 0)
-		return -ENODEV;
-
-	ret = devm_gpio_request(dev, kirin_pcie->gpio_id_clkreq[0],
-				    "pcie_eth_clkreq");
-	if (ret)
-		return ret;
-
-	ret = devm_gpio_request(dev, kirin_pcie->gpio_id_clkreq[1],
-				    "pcie_m_2_clkreq");
-	if (ret)
-		return ret;
-
-	ret = devm_gpio_request(dev, kirin_pcie->gpio_id_clkreq[2],
-				    "pcie_mini1_clkreq");
-	if (ret)
-		return ret;
-
 	kirin_pcie->crgctrl =
 		syscon_regmap_lookup_by_compatible("hisilicon,hi3670-crgctrl");
 	if (IS_ERR(kirin_pcie->crgctrl))
@@ -848,7 +846,6 @@ static int kirin970_pcie_noc_power(struct kirin_pcie *kirin_pcie, bool enable)
 
 static int kirin970_pcie_power_on(struct kirin_pcie *kirin_pcie)
 {
-	struct device *dev = kirin_pcie->pci->dev;
 	int ret, i;
 	u32 val;
 
@@ -858,17 +855,11 @@ static int kirin970_pcie_power_on(struct kirin_pcie *kirin_pcie)
 	usleep_range(TIME_CMOS_MIN, TIME_CMOS_MAX);
 	kirin_pcie_oe_enable(kirin_pcie);
 
-	ret = gpio_direction_output(kirin_pcie->gpio_id_clkreq[0], 0);
-	if (ret)
-		dev_err(dev, "Failed to pulse eth clkreq signal\n");
-
-	ret = gpio_direction_output(kirin_pcie->gpio_id_clkreq[1], 0);
-	if (ret)
-		dev_err(dev, "Failed to pulse m.2 clkreq signal\n");
-
-	ret = gpio_direction_output(kirin_pcie->gpio_id_clkreq[2], 0);
-	if (ret)
-		dev_err(dev, "Failed to pulse mini1 clkreq signal\n");
+	for (i = 0; i < kirin_pcie->n_gpio_clkreq; i++) {
+		ret = gpio_direction_output(kirin_pcie->gpio_id_clkreq[i], 0);
+		if (ret)
+			return ret;
+	}
 
 	ret = kirin_pcie_clk_ctrl(kirin_pcie, true);
 	if (ret)
-- 
2.29.2


  parent reply	other threads:[~2021-02-02 13:32 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-02 13:29 [PATCH 00/13] Add support for Hikey 970 PCIe Mauro Carvalho Chehab
2021-02-02 13:29 ` Mauro Carvalho Chehab
2021-02-02 13:29 ` Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 01/13] doc: bindings: pci: designware-pcie.txt: convert it to yaml Mauro Carvalho Chehab
2021-02-02 13:29   ` Mauro Carvalho Chehab
2021-02-02 13:29   ` Mauro Carvalho Chehab
2021-02-02 17:44   ` Rob Herring
2021-02-02 17:44     ` Rob Herring
2021-02-02 17:44     ` Rob Herring
2021-02-03  6:49     ` Mauro Carvalho Chehab
2021-02-03  6:49       ` Mauro Carvalho Chehab
2021-02-03  6:49       ` Mauro Carvalho Chehab
2021-02-04 17:29       ` Rob Herring
2021-02-04 17:29         ` Rob Herring
2021-02-04 17:29         ` Rob Herring
2021-02-04 18:29         ` Mauro Carvalho Chehab
2021-02-04 18:29           ` Mauro Carvalho Chehab
2021-02-04 18:29           ` Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 02/13] doc: bindings: kirin-pcie.txt: " Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 03/13] doc: bindings: add new parameters used by Hikey 970 Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 04/13] pci: dwc: pcie-kirin: add HI3670 PCI-E controller support Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 05/13] arm64: dts: hisilicon: Add " Mauro Carvalho Chehab
2021-02-02 13:29   ` Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 06/13] pci: dwc: pcie-kirin: simplify error handling logic Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 07/13] pci: dwc: pcie-kirin: simplify kirin 970 get resource logic Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 08/13] pci: dwc: pcie-kirin: place common init code altogether Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 09/13] pci: dwc: pcie-kirin: allow to optionally require a regulator Mauro Carvalho Chehab
2021-02-02 13:41   ` Mark Brown
2021-02-02 14:50     ` Mauro Carvalho Chehab
2021-02-02 16:02       ` Mark Brown
2021-02-02 13:29 ` [PATCH 10/13] pci: dwc: pcie-kirin: allow using multiple reset GPIOs Mauro Carvalho Chehab
2021-02-02 13:29 ` Mauro Carvalho Chehab [this message]
2021-02-02 13:29 ` [PATCH 12/13] pci: dwc: pcie-kirin: cleanup kirin970_pcie_get_eyeparam() Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 13/13] arm64: dts: hisilicon: cleanup Hikey 970 PCI schema Mauro Carvalho Chehab
2021-02-02 13:29   ` Mauro Carvalho Chehab
2021-02-02 14:48 ` [PATCH 00/13] Add support for Hikey 970 PCIe Bjorn Helgaas
2021-02-02 14:48   ` Bjorn Helgaas
2021-02-02 14:48   ` Bjorn Helgaas

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