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From: Michal Simek <monstr@monstr.eu>
To: u-boot@lists.denx.de, git@xilinx.com
Cc: Michal Simek <michal.simek@xilinx.com>
Subject: [PATCH 10/10] arm64: zynqmp: Add DT description for si5328 for zcu102/zcu106
Date: Wed, 11 May 2022 11:52:54 +0200	[thread overview]
Message-ID: <db66a4bb501183ffbd033da4dd263afdb214f8ec.1652262769.git.michal.simek@amd.com> (raw)
In-Reply-To: <cover.1652262769.git.michal.simek@amd.com>

From: Michal Simek <michal.simek@xilinx.com>

Origin DT binding just specify driver but wasn't aligned with DT binding
which came later. Extend description for zcu102 and zcu106 to cover latest
binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm/dts/zynqmp-zcu102-revA.dts | 21 ++++++++++++++++++++-
 arch/arm/dts/zynqmp-zcu106-revA.dts | 21 ++++++++++++++++++++-
 2 files changed, 40 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index aac798d6e74a..c13b52a6aeaa 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -604,7 +604,26 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <4>;
-			/* SI5328 - u20 */
+			si5328: clock-generator@69 {/* SI5328 - u20 */
+				compatible = "silabs,si5328";
+				reg = <0x69>;
+				/*
+				 * Chip has interrupt present connected to PL
+				 * interrupt-parent = <&>;
+				 * interrupts = <>;
+				 */
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#clock-cells = <1>;
+				clocks = <&refhdmi>;
+				clock-names = "xtal";
+				clock-output-names = "si5328";
+
+				si5328_clk: clk0@0 {
+					reg = <0>;
+					clock-frequency = <27000000>;
+				};
+			};
 		};
 		/* 5 - 7 unconnected */
 	};
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index 03624648cd71..6dfc8fe17bf2 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -593,7 +593,26 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <4>;
-			/* SI5328 - u20 */
+			si5328: clock-generator@69 {/* SI5328 - u20 */
+				compatible = "silabs,si5328";
+				reg = <0x69>;
+				/*
+				 * Chip has interrupt present connected to PL
+				 * interrupt-parent = <&>;
+				 * interrupts = <>;
+				 */
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#clock-cells = <1>;
+				clocks = <&refhdmi>;
+				clock-names = "xtal";
+				clock-output-names = "si5328";
+
+				si5328_clk: clk0@0 {
+					reg = <0>;
+					clock-frequency = <27000000>;
+				};
+			};
 		};
 		i2c@5 {
 			#address-cells = <1>;
-- 
2.36.0


  parent reply	other threads:[~2022-05-11  9:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-11  9:52 [PATCH 00/10] arm64: zynqmp: Various DT fixes Michal Simek
2022-05-11  9:52 ` [PATCH 01/10] arm64: zynqmp: Add mode-pin GPIO controller DT node Michal Simek
2022-05-11  9:52 ` [PATCH 02/10] arm64: zynqmp: Add gpio labels for modepin Michal Simek
2022-05-11  9:52 ` [PATCH 03/10] arm64: zynqmp: Fix opp-table-cpu Michal Simek
2022-05-11  9:52 ` [PATCH 04/10] arm64: zynqmp: Add power domain description for PL Michal Simek
2022-05-11  9:52 ` [PATCH 05/10] arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property Michal Simek
2022-05-11  9:52 ` [PATCH 06/10] arm64: zynqmp: Add dmas, gpu, rtc, watchdogs and opp nodes for SOM Michal Simek
2022-05-11  9:52 ` [PATCH 07/10] Revert "arm64: zynqmp: Add zynqmp firmware specific DT nodes" Michal Simek
2022-05-11  9:52 ` [PATCH 08/10] arm64: zynqmp: Add PHY description for SGMII on vck190 SC Michal Simek
2022-05-11  9:52 ` [PATCH 09/10] arm64: zynqmp: Add linux,code for fwuen button Michal Simek
2022-05-11  9:52 ` Michal Simek [this message]
2022-05-18 11:11 ` [PATCH 00/10] arm64: zynqmp: Various DT fixes Michal Simek

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