From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Simon Horman <horms@verge.net.au>,
Rob Herring <robh+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Magnus Damm <magnus.damm@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: dts: renesas: r8a77980: add PFC support
Date: Fri, 9 Mar 2018 15:06:32 +0300 [thread overview]
Message-ID: <e1130d4e-7c70-fe3d-1a09-349e95ad1b33@cogentembedded.com> (raw)
In-Reply-To: <88e52531-e538-8685-110a-1a2e79a3fe49@cogentembedded.com>
Define the generic R8A77980 part of the PFC device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 5 +++++
1 file changed, 5 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -71,6 +71,11 @@
#size-cells = <2>;
ranges;
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a77980";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a77980-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Simon Horman <horms@verge.net.au>,
Rob Herring <robh+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Cc: Magnus Damm <magnus.damm@gmail.com>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: dts: renesas: r8a77980: add PFC support
Date: Fri, 9 Mar 2018 15:06:32 +0300 [thread overview]
Message-ID: <e1130d4e-7c70-fe3d-1a09-349e95ad1b33@cogentembedded.com> (raw)
In-Reply-To: <88e52531-e538-8685-110a-1a2e79a3fe49@cogentembedded.com>
Define the generic R8A77980 part of the PFC device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 5 +++++
1 file changed, 5 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -71,6 +71,11 @@
#size-cells = <2>;
ranges;
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a77980";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a77980-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: dts: renesas: r8a77980: add PFC support
Date: Fri, 9 Mar 2018 15:06:32 +0300 [thread overview]
Message-ID: <e1130d4e-7c70-fe3d-1a09-349e95ad1b33@cogentembedded.com> (raw)
In-Reply-To: <88e52531-e538-8685-110a-1a2e79a3fe49@cogentembedded.com>
Define the generic R8A77980 part of the PFC device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 5 +++++
1 file changed, 5 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -71,6 +71,11 @@
#size-cells = <2>;
ranges;
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a77980";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
cpg: clock-controller at e6150000 {
compatible = "renesas,r8a77980-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
next prev parent reply other threads:[~2018-03-09 12:06 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-09 12:04 [PATCH 0/3] Add R8A77980/Condor PFC support Sergei Shtylyov
2018-03-09 12:04 ` Sergei Shtylyov
2018-03-09 12:04 ` Sergei Shtylyov
2018-03-09 12:06 ` Sergei Shtylyov [this message]
2018-03-09 12:06 ` [PATCH 1/3] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
2018-03-09 12:06 ` Sergei Shtylyov
2018-03-09 12:36 ` Geert Uytterhoeven
2018-03-09 12:36 ` Geert Uytterhoeven
2018-03-09 12:36 ` Geert Uytterhoeven
2018-03-09 12:07 ` [PATCH 2/3] arm64: dts: renesas: condor: add SCIF0 pins Sergei Shtylyov
2018-03-09 12:07 ` Sergei Shtylyov
2018-03-09 12:07 ` Sergei Shtylyov
2018-03-09 12:39 ` Geert Uytterhoeven
2018-03-09 12:39 ` Geert Uytterhoeven
2018-03-09 12:39 ` Geert Uytterhoeven
2018-03-09 12:09 ` [PATCH 3/3] arm64: dts: renesas: condor: add EtherAVB pins Sergei Shtylyov
2018-03-09 12:09 ` Sergei Shtylyov
2018-03-09 12:09 ` Sergei Shtylyov
2018-03-09 12:44 ` Geert Uytterhoeven
2018-03-09 12:44 ` Geert Uytterhoeven
2018-03-09 12:44 ` Geert Uytterhoeven
2018-03-09 17:26 ` Sergei Shtylyov
2018-03-09 17:26 ` Sergei Shtylyov
2018-03-09 17:26 ` Sergei Shtylyov
2018-03-13 18:46 ` [PATCH 0/3] Add R8A77980/Condor PFC support Simon Horman
2018-03-13 18:46 ` Simon Horman
2018-03-13 18:46 ` Simon Horman
2018-04-20 17:33 ` Sergei Shtylyov
2018-04-20 17:33 ` Sergei Shtylyov
2018-04-20 17:33 ` Sergei Shtylyov
2018-04-24 9:20 ` Simon Horman
2018-04-24 9:20 ` Simon Horman
2018-04-24 9:20 ` Simon Horman
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