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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Simon Horman <horms@verge.net.au>,
	linux-renesas-soc@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: dts: renesas: r8a77980: add SMP support
Date: Thu, 17 May 2018 23:19:44 +0300	[thread overview]
Message-ID: <ec4c6905-23d1-8600-a1cc-4297fbd1ddaa@cogentembedded.com> (raw)
In-Reply-To: <14666252.G84Ipxe6EL@wasted.cogentembedded.com>

Add the device nodes for 3 more Cortex-A53 CPU cores; adjust the interrupt
delivery masks for the ARM GIC and Architectured Timer.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
The patch is against the 'renesas-devel-20180516v2-v4.17-rc5' tag of Simon
Horman's 'renesas.git' repo. Tested successfully on the V3M Starter Kit board
(except offlining CPU0 hangs the kernel).

 arch/arm64/boot/dts/renesas/r8a77980.dtsi |   40 ++++++++++++++++++++++++++----
 1 file changed, 35 insertions(+), 5 deletions(-)

Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -30,6 +30,36 @@
 			enable-method = "psci";
 		};
 
+		a53_1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <1>;
+			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+			power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+		};
+
+		a53_2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <2>;
+			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+			power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+		};
+
+		a53_3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <3>;
+			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+			power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+		};
+
 		L2_CA53: cache-controller {
 			compatible = "cache";
 			power-domains = <&sysc R8A77980_PD_CA53_SCU>;
@@ -408,7 +438,7 @@
 			      <0x0 0xf1020000 0 0x20000>,
 			      <0x0 0xf1040000 0 0x20000>,
 			      <0x0 0xf1060000 0 0x20000>;
-			interrupts = <GIC_PPI 9	(GIC_CPU_MASK_SIMPLE(1) |
+			interrupts = <GIC_PPI 9	(GIC_CPU_MASK_SIMPLE(4) |
 				      IRQ_TYPE_LEVEL_HIGH)>;
 			clocks = <&cpg CPG_MOD 408>;
 			clock-names = "clk";
@@ -424,13 +454,13 @@
 
 	timer {
 		compatible = "arm,armv8-timer";
-		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
+		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>,
-				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
+				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>,
-				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
+				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>,
-				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
+				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>;
 	};
 };

WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: dts: renesas: r8a77980: add SMP support
Date: Thu, 17 May 2018 23:19:44 +0300	[thread overview]
Message-ID: <ec4c6905-23d1-8600-a1cc-4297fbd1ddaa@cogentembedded.com> (raw)
In-Reply-To: <14666252.G84Ipxe6EL@wasted.cogentembedded.com>

Add the device nodes for 3 more Cortex-A53 CPU cores; adjust the interrupt
delivery masks for the ARM GIC and Architectured Timer.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
The patch is against the 'renesas-devel-20180516v2-v4.17-rc5' tag of Simon
Horman's 'renesas.git' repo. Tested successfully on the V3M Starter Kit board
(except offlining CPU0 hangs the kernel).

 arch/arm64/boot/dts/renesas/r8a77980.dtsi |   40 ++++++++++++++++++++++++++----
 1 file changed, 35 insertions(+), 5 deletions(-)

Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -30,6 +30,36 @@
 			enable-method = "psci";
 		};
 
+		a53_1: cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <1>;
+			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+			power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+		};
+
+		a53_2: cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <2>;
+			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+			power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+		};
+
+		a53_3: cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53","arm,armv8";
+			reg = <3>;
+			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+			power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+		};
+
 		L2_CA53: cache-controller {
 			compatible = "cache";
 			power-domains = <&sysc R8A77980_PD_CA53_SCU>;
@@ -408,7 +438,7 @@
 			      <0x0 0xf1020000 0 0x20000>,
 			      <0x0 0xf1040000 0 0x20000>,
 			      <0x0 0xf1060000 0 0x20000>;
-			interrupts = <GIC_PPI 9	(GIC_CPU_MASK_SIMPLE(1) |
+			interrupts = <GIC_PPI 9	(GIC_CPU_MASK_SIMPLE(4) |
 				      IRQ_TYPE_LEVEL_HIGH)>;
 			clocks = <&cpg CPG_MOD 408>;
 			clock-names = "clk";
@@ -424,13 +454,13 @@
 
 	timer {
 		compatible = "arm,armv8-timer";
-		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
+		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>,
-				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
+				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>,
-				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
+				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>,
-				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
+				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
 				       IRQ_TYPE_LEVEL_LOW)>;
 	};
 };

  parent reply	other threads:[~2018-05-17 20:19 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-12 20:47 [PATCH v5 00/12] Add R8A7792/Blanche board support Sergei Shtylyov
2016-06-12 20:47 ` Sergei Shtylyov
2016-06-12 20:53 ` [PATCH v5 01/12] ARM: shmobile: r8a7792: add clock index macros Sergei Shtylyov
2016-06-12 20:54 ` [PATCH v5 02/12] ARM: shmobile: r8a7792: add power domain " Sergei Shtylyov
2016-06-12 20:56 ` [PATCH v5 03/12] soc: renesas: rcar-sysc: add R8A7792 support Sergei Shtylyov
2016-06-12 21:01 ` [PATCH v5 04/12] ARM: shmobile: r8a7792: basic SoC support Sergei Shtylyov
2016-06-12 21:01   ` Sergei Shtylyov
2016-06-12 21:04 ` [PATCH v5 05/12] ARM: shmobile: r8a7792: add SMP support Sergei Shtylyov
2016-06-12 21:04   ` Sergei Shtylyov
2016-06-15  2:30   ` Simon Horman
2016-06-15  2:30     ` Simon Horman
2016-06-15 10:43     ` Sergei Shtylyov
2016-06-15 10:43       ` Sergei Shtylyov
2016-06-16  5:19       ` Simon Horman
2016-06-16  5:19         ` Simon Horman
2016-06-12 21:06 ` [PATCH v5 06/12] ARM: dts: r8a7792: initial SoC device tree Sergei Shtylyov
2016-06-12 21:06   ` Sergei Shtylyov
2016-06-12 21:08 ` [PATCH v5 07/12] ARM: dts: r8a7792: add SYS-DMAC support Sergei Shtylyov
2016-06-12 21:08   ` Sergei Shtylyov
2016-06-12 21:09 ` [PATCH v5 08/12] ARM: dts: r8a7792: add [H]SCIF support Sergei Shtylyov
2016-06-12 21:09   ` Sergei Shtylyov
2016-06-12 21:12 ` [PATCH v5 09/12] ARM: dts: r8a7792: add IRQC support Sergei Shtylyov
2016-06-12 21:12   ` Sergei Shtylyov
2016-06-12 21:14 ` [PATCH v5 10/12] DT: arm: shmobile: document Blanche board Sergei Shtylyov
2016-06-12 21:15 ` [PATCH v5 11/12] ARM: dts: blanche: initial device tree Sergei Shtylyov
2016-06-12 21:15   ` Sergei Shtylyov
2016-06-12 21:17 ` [PATCH v5 12/12] ARM: dts: blanche: add Ethernet support Sergei Shtylyov
2016-06-12 21:17   ` Sergei Shtylyov
2016-06-20 22:31 ` [PATCH] ARM: dts: r8a7792: add SMP support Sergei Shtylyov
2016-06-20 22:31   ` Sergei Shtylyov
2016-06-20 22:31   ` Sergei Shtylyov
     [not found]   ` <1627631.X1bJtVQHBF-gHKXc3Y1Z8zGSmamagVegGFoWSdPRAKMAL8bYrjMMd8@public.gmane.org>
2016-06-21  7:10     ` Geert Uytterhoeven
2016-06-21  7:10       ` Geert Uytterhoeven
2016-06-21  7:10       ` Geert Uytterhoeven
2016-06-29 16:46   ` Sergei Shtylyov
2016-06-29 16:46     ` Sergei Shtylyov
2016-06-30 12:27     ` Simon Horman
2016-06-30 12:27       ` Simon Horman
2016-06-30 17:52       ` Sergei Shtylyov
2016-06-30 17:52         ` Sergei Shtylyov
2016-06-21 22:03 ` [PATCH] ARM: dts: r8a7794: " Sergei Shtylyov
2016-06-21 22:03   ` Sergei Shtylyov
2016-06-21 22:03   ` Sergei Shtylyov
     [not found]   ` <27171008.uuY7altQup-gHKXc3Y1Z8zGSmamagVegGFoWSdPRAKMAL8bYrjMMd8@public.gmane.org>
2016-06-22  7:20     ` Geert Uytterhoeven
2016-06-22  7:20       ` Geert Uytterhoeven
2016-06-22  7:20       ` Geert Uytterhoeven
2016-06-22 10:08       ` Sergei Shtylyov
2016-06-22 10:08         ` Sergei Shtylyov
2016-06-22 10:08         ` Sergei Shtylyov
2016-06-22 10:20         ` Geert Uytterhoeven
2016-06-22 10:20           ` Geert Uytterhoeven
2016-06-23  8:11           ` Geert Uytterhoeven
2016-06-23  8:11             ` Geert Uytterhoeven
2018-05-08 16:39 ` [PATCH] arm64: dts: renesas: r8a77970: " Sergei Shtylyov
2018-05-08 16:39   ` Sergei Shtylyov
2018-05-08 18:40   ` Geert Uytterhoeven
2018-05-08 18:40     ` Geert Uytterhoeven
2018-05-08 18:40     ` Geert Uytterhoeven
2018-05-08 18:47     ` Sergei Shtylyov
2018-05-08 18:47       ` Sergei Shtylyov
2018-05-08 18:47       ` Sergei Shtylyov
2018-05-09 19:05       ` Simon Horman
2018-05-09 19:05         ` Simon Horman
2018-05-09 19:05         ` Simon Horman
2018-05-10 16:43         ` Sergei Shtylyov
2018-05-10 16:43           ` Sergei Shtylyov
2018-05-10 16:43           ` Sergei Shtylyov
2018-05-12 14:08           ` Simon Horman
2018-05-12 14:08             ` Simon Horman
2018-05-12 14:08             ` Simon Horman
2018-05-17 20:19 ` Sergei Shtylyov [this message]
2018-05-17 20:19   ` [PATCH] arm64: dts: renesas: r8a77980: " Sergei Shtylyov
2018-05-17 20:23   ` Geert Uytterhoeven
2018-05-17 20:23     ` Geert Uytterhoeven
2018-05-17 20:23     ` Geert Uytterhoeven
2018-05-19 17:38     ` Sergei Shtylyov
2018-05-19 17:38       ` Sergei Shtylyov
2018-05-19 17:38       ` Sergei Shtylyov
2018-05-22  8:54       ` Simon Horman
2018-05-22  8:54         ` Simon Horman
2018-05-22  8:54         ` Simon Horman
2018-05-22  9:49         ` Geert Uytterhoeven
2018-05-22  9:49           ` Geert Uytterhoeven
2018-05-22  9:49           ` Geert Uytterhoeven
2018-05-23  8:30           ` Simon Horman
2018-05-23  8:30             ` Simon Horman
2018-05-23  8:30             ` Simon Horman
2018-05-22  8:54   ` Simon Horman
2018-05-22  8:54     ` Simon Horman
2018-05-22  8:54     ` Simon Horman

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