From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: linux-renesas-soc@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-clk@vger.kernel.org
Subject: [PATCH v3 0/4] Renesas R8A77980 CPG/MSSR RPC clock support
Date: Tue, 22 Jan 2019 22:55:44 +0300 [thread overview]
Message-ID: <f1c53dd5-2dc5-9f11-44e3-8e222ed21903@cogentembedded.com> (raw)
Hello!
Here's the set of 4 patches against the 'clk-renesas' branch of Geert Uytterhoeven's
'renesas-drivers.git' repo. We're adding support for the R8A77980 CPG/MSSR RPC clocks...
[1/4] clk: renesas: rcar-gen3-cpg: factor out cpg_reg_modify()
[2/4] clk: renesas: rcar-gen3-cpg: add spinlock
[3/4] clk: renesas: rcar-gen3-cpg: add RPC clocks
[4/4] clk: renesas: r8a77980-cpg-mssr: add RPC clocks
MBR, Sergei
next reply other threads:[~2019-01-22 19:55 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-22 19:55 Sergei Shtylyov [this message]
2019-01-22 19:57 ` [PATCH v3 1/4] clk: renesas: rcar-gen3-cpg: factor out cpg_reg_modify() Sergei Shtylyov
2019-01-22 19:58 ` [PATCH v3 2/4] clk: renesas: rcar-gen3-cpg: add spinlock Sergei Shtylyov
2019-01-22 19:59 ` [PATCH v3 3/4] clk: renesas: rcar-gen3-cpg: add RPC clocks Sergei Shtylyov
2019-01-25 10:25 ` Geert Uytterhoeven
2019-01-22 20:01 ` [PATCH v3 4/4] clk: renesas: r8a77980-cpg-mssr: " Sergei Shtylyov
2019-01-25 10:25 ` [PATCH v3 0/4] Renesas R8A77980 CPG/MSSR RPC clock support Geert Uytterhoeven
2019-03-07 19:53 ` [PATCH] clk: renesas: r8a77980-cpg-mssr: fix RPC-IF module clock's parent Sergei Shtylyov
2019-03-11 9:30 ` Geert Uytterhoeven
2019-03-11 17:14 ` Sergei Shtylyov
2019-03-11 19:10 ` Sergei Shtylyov
2019-09-27 18:09 ` [PATCH] clk: renesas: rcar-gen3: allow changing the RPC[D2] clocks Sergei Shtylyov
2019-10-07 11:45 ` Geert Uytterhoeven
2019-10-07 11:49 ` Sergei Shtylyov
2019-12-17 20:43 ` Geert Uytterhoeven
2019-12-18 19:34 ` Sergei Shtylyov
2019-12-20 14:31 ` Geert Uytterhoeven
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