From: Robin Murphy <robin.murphy@arm.com> To: will@kernel.org Cc: bjorn.andersson@linaro.org, iommu@lists.linux-foundation.org, gregory.clement@bootlin.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH 04/15] iommu/arm-smmu: Rework cb_base handling Date: Fri, 9 Aug 2019 18:07:41 +0100 [thread overview] Message-ID: <f4dccad78815ca0a2dd7926be7052759d099b920.1565369764.git.robin.murphy@arm.com> (raw) In-Reply-To: <cover.1565369764.git.robin.murphy@arm.com> To keep register-access quirks manageable, we want to structure things to avoid needing too many individual overrides. It seems fairly clean to have a single interface which handles both global and context registers in terms of the architectural pages, so the first preparatory step is to rework cb_base into a page number rather than an absolute address. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- drivers/iommu/arm-smmu.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index d9a93e5f422f..463bc8d98adb 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -95,7 +95,7 @@ #endif /* Translation context bank */ -#define ARM_SMMU_CB(smmu, n) ((smmu)->cb_base + ((n) << (smmu)->pgshift)) +#define ARM_SMMU_CB(smmu, n) ((smmu)->base + (((smmu)->cb_base + (n)) << (smmu)->pgshift)) #define MSI_IOVA_BASE 0x8000000 #define MSI_IOVA_LENGTH 0x100000 @@ -168,8 +168,8 @@ struct arm_smmu_device { struct device *dev; void __iomem *base; - void __iomem *cb_base; - unsigned long pgshift; + unsigned int cb_base; + unsigned int pgshift; #define ARM_SMMU_FEAT_COHERENT_WALK (1 << 0) #define ARM_SMMU_FEAT_STREAM_MATCH (1 << 1) @@ -1815,7 +1815,7 @@ static int arm_smmu_id_size_to_bits(int size) static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) { - unsigned long size; + unsigned int size; void __iomem *gr0_base = ARM_SMMU_GR0(smmu); u32 id; bool cttw_reg, cttw_fw = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK; @@ -1899,7 +1899,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) return -ENOMEM; dev_notice(smmu->dev, - "\tstream matching with %lu register groups", size); + "\tstream matching with %u register groups", size); } /* s2cr->type == 0 means translation, so initialise explicitly */ smmu->s2crs = devm_kmalloc_array(smmu->dev, size, sizeof(*smmu->s2crs), @@ -1925,11 +1925,12 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) /* Check for size mismatch of SMMU address space from mapped region */ size = 1 << (FIELD_GET(ID1_NUMPAGENDXB, id) + 1); - size <<= smmu->pgshift; - if (smmu->cb_base != gr0_base + size) + if (smmu->cb_base != 2 * size << smmu->pgshift) dev_warn(smmu->dev, - "SMMU address space size (0x%lx) differs from mapped region size (0x%tx)!\n", - size * 2, (smmu->cb_base - gr0_base) * 2); + "SMMU address space size (0x%x) differs from mapped region size (0x%x)!\n", + 2 * size << smmu->pgshift, smmu->cb_base); + /* Now cb_base can reach its final form: a page number */ + smmu->cb_base = size; smmu->num_s2_context_banks = FIELD_GET(ID1_NUMS2CB, id); smmu->num_context_banks = FIELD_GET(ID1_NUMCB, id); @@ -2200,7 +2201,8 @@ static int arm_smmu_device_probe(struct platform_device *pdev) smmu->base = devm_ioremap_resource(dev, res); if (IS_ERR(smmu->base)) return PTR_ERR(smmu->base); - smmu->cb_base = smmu->base + resource_size(res) / 2; + /* We'll finish calculating this later once we know the page size */ + smmu->cb_base = resource_size(res); num_irqs = 0; while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, num_irqs))) { -- 2.21.0.dirty _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com> To: will@kernel.org Cc: robdclark@gmail.com, joro@8bytes.org, bjorn.andersson@linaro.org, iommu@lists.linux-foundation.org, vivek.gautam@codeaurora.org, gregory.clement@bootlin.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH 04/15] iommu/arm-smmu: Rework cb_base handling Date: Fri, 9 Aug 2019 18:07:41 +0100 [thread overview] Message-ID: <f4dccad78815ca0a2dd7926be7052759d099b920.1565369764.git.robin.murphy@arm.com> (raw) In-Reply-To: <cover.1565369764.git.robin.murphy@arm.com> To keep register-access quirks manageable, we want to structure things to avoid needing too many individual overrides. It seems fairly clean to have a single interface which handles both global and context registers in terms of the architectural pages, so the first preparatory step is to rework cb_base into a page number rather than an absolute address. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- drivers/iommu/arm-smmu.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index d9a93e5f422f..463bc8d98adb 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -95,7 +95,7 @@ #endif /* Translation context bank */ -#define ARM_SMMU_CB(smmu, n) ((smmu)->cb_base + ((n) << (smmu)->pgshift)) +#define ARM_SMMU_CB(smmu, n) ((smmu)->base + (((smmu)->cb_base + (n)) << (smmu)->pgshift)) #define MSI_IOVA_BASE 0x8000000 #define MSI_IOVA_LENGTH 0x100000 @@ -168,8 +168,8 @@ struct arm_smmu_device { struct device *dev; void __iomem *base; - void __iomem *cb_base; - unsigned long pgshift; + unsigned int cb_base; + unsigned int pgshift; #define ARM_SMMU_FEAT_COHERENT_WALK (1 << 0) #define ARM_SMMU_FEAT_STREAM_MATCH (1 << 1) @@ -1815,7 +1815,7 @@ static int arm_smmu_id_size_to_bits(int size) static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) { - unsigned long size; + unsigned int size; void __iomem *gr0_base = ARM_SMMU_GR0(smmu); u32 id; bool cttw_reg, cttw_fw = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK; @@ -1899,7 +1899,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) return -ENOMEM; dev_notice(smmu->dev, - "\tstream matching with %lu register groups", size); + "\tstream matching with %u register groups", size); } /* s2cr->type == 0 means translation, so initialise explicitly */ smmu->s2crs = devm_kmalloc_array(smmu->dev, size, sizeof(*smmu->s2crs), @@ -1925,11 +1925,12 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) /* Check for size mismatch of SMMU address space from mapped region */ size = 1 << (FIELD_GET(ID1_NUMPAGENDXB, id) + 1); - size <<= smmu->pgshift; - if (smmu->cb_base != gr0_base + size) + if (smmu->cb_base != 2 * size << smmu->pgshift) dev_warn(smmu->dev, - "SMMU address space size (0x%lx) differs from mapped region size (0x%tx)!\n", - size * 2, (smmu->cb_base - gr0_base) * 2); + "SMMU address space size (0x%x) differs from mapped region size (0x%x)!\n", + 2 * size << smmu->pgshift, smmu->cb_base); + /* Now cb_base can reach its final form: a page number */ + smmu->cb_base = size; smmu->num_s2_context_banks = FIELD_GET(ID1_NUMS2CB, id); smmu->num_context_banks = FIELD_GET(ID1_NUMCB, id); @@ -2200,7 +2201,8 @@ static int arm_smmu_device_probe(struct platform_device *pdev) smmu->base = devm_ioremap_resource(dev, res); if (IS_ERR(smmu->base)) return PTR_ERR(smmu->base); - smmu->cb_base = smmu->base + resource_size(res) / 2; + /* We'll finish calculating this later once we know the page size */ + smmu->cb_base = resource_size(res); num_irqs = 0; while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, num_irqs))) { -- 2.21.0.dirty _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-09 17:08 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-09 17:07 [PATCH 00/15] Arm SMMU refactoring Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 01/15] iommu/arm-smmu: Convert GR0 registers to bitfields Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-14 17:20 ` Will Deacon 2019-08-14 17:20 ` Will Deacon 2019-08-14 17:35 ` Robin Murphy 2019-08-14 17:35 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 02/15] iommu/arm-smmu: Convert GR1 " Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 03/15] iommu/arm-smmu: Convert context bank " Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` Robin Murphy [this message] 2019-08-09 17:07 ` [PATCH 04/15] iommu/arm-smmu: Rework cb_base handling Robin Murphy 2019-08-14 18:05 ` Will Deacon 2019-08-14 18:05 ` Will Deacon 2019-08-15 11:14 ` Robin Murphy 2019-08-15 11:14 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 05/15] iommu/arm-smmu: Split arm_smmu_tlb_inv_range_nosync() Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-15 10:56 ` Will Deacon 2019-08-15 10:56 ` Will Deacon 2019-08-15 11:22 ` Robin Murphy 2019-08-15 11:22 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 06/15] iommu/arm-smmu: Get rid of weird "atomic" write Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 07/15] iommu/arm-smmu: Abstract GR1 accesses Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 08/15] iommu/arm-smmu: Abstract context bank accesses Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-15 10:56 ` Will Deacon 2019-08-15 10:56 ` Will Deacon 2019-08-15 11:41 ` Robin Murphy 2019-08-15 11:41 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 09/15] iommu/arm-smmu: Abstract GR0 accesses Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 10/15] iommu/arm-smmu: Rename arm-smmu-regs.h Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 11/15] iommu/arm-smmu: Add implementation infrastructure Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 12/15] iommu/arm-smmu: Move Secure access quirk to implementation Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 13/15] iommu/arm-smmu: Add configuration implementation hook Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 14/15] iommu/arm-smmu: Add reset " Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-09 17:07 ` [PATCH 15/15] iommu/arm-smmu: Add context init " Robin Murphy 2019-08-09 17:07 ` Robin Murphy 2019-08-13 19:11 ` Krishna Reddy 2019-08-13 19:11 ` Krishna Reddy 2019-08-15 10:56 ` Will Deacon 2019-08-15 10:56 ` Will Deacon 2019-08-15 12:09 ` Robin Murphy 2019-08-15 12:09 ` Robin Murphy 2019-08-15 15:09 ` Jordan Crouse 2019-08-15 15:09 ` Jordan Crouse 2019-08-09 17:11 ` [PATCH 00/15] Arm SMMU refactoring Robin Murphy 2019-08-09 17:11 ` Robin Murphy 2019-08-15 10:55 ` Will Deacon 2019-08-15 10:55 ` Will Deacon
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