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From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Deepak M <m.deepak@intel.com>, jani.nikula@intel.com
Subject: [PATCH 5/8] drm/i915/dsi: clean up the VLV gpio table and definitions
Date: Thu, 17 Mar 2016 17:04:43 +0200	[thread overview]
Message-ID: <f9943d4e382d0f0f7a7665c9e52fbb2c34b928c4.1458226863.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1458226863.git.jani.nikula@intel.com>
In-Reply-To: <cover.1458226863.git.jani.nikula@intel.com>

Add some VLV prefixes, remove redundant initialization, etc. No
functional changes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 60 +++++++++++++++---------------
 1 file changed, 30 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 82047eefd3e1..3c6275f85ae2 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -58,39 +58,39 @@ static inline struct vbt_panel *to_vbt_panel(struct drm_panel *panel)
 
 #define NS_KHZ_RATIO 1000000
 
-#define GPI0_NC_0_HV_DDI0_HPD           0x4130
-#define GPIO_NC_1_HV_DDI0_DDC_SDA       0x4120
-#define GPIO_NC_2_HV_DDI0_DDC_SCL       0x4110
-#define GPIO_NC_3_PANEL0_VDDEN          0x4140
-#define GPIO_NC_4_PANEL0_BLKEN          0x4150
-#define GPIO_NC_5_PANEL0_BLKCTL         0x4160
-#define GPIO_NC_6_PCONF0                0x4180
-#define GPIO_NC_7_PCONF0                0x4190
-#define GPIO_NC_8_PCONF0                0x4170
-#define GPIO_NC_9_PCONF0                0x4100
-#define GPIO_NC_10_PCONF0               0x40E0
-#define GPIO_NC_11_PCONF0               0x40F0
+#define VLV_GPIO_NC_0_HV_DDI0_HPD	0x4130
+#define VLV_GPIO_NC_1_HV_DDI0_DDC_SDA	0x4120
+#define VLV_GPIO_NC_2_HV_DDI0_DDC_SCL	0x4110
+#define VLV_GPIO_NC_3_PANEL0_VDDEN	0x4140
+#define VLV_GPIO_NC_4_PANEL0_BLKEN	0x4150
+#define VLV_GPIO_NC_5_PANEL0_BLKCTL	0x4160
+#define VLV_GPIO_NC_6_PCONF0		0x4180
+#define VLV_GPIO_NC_7_PCONF0		0x4190
+#define VLV_GPIO_NC_8_PCONF0		0x4170
+#define VLV_GPIO_NC_9_PCONF0		0x4100
+#define VLV_GPIO_NC_10_PCONF0		0x40E0
+#define VLV_GPIO_NC_11_PCONF0		0x40F0
 
 #define VLV_FUNCTION_TO_PAD_REG(reg) ((reg) + 8)
 
 struct gpio_table {
 	u16 function_reg;
-	u8 init;
+	bool init;
 };
 
-static struct gpio_table gtable[] = {
-	{ GPI0_NC_0_HV_DDI0_HPD, 0 },
-	{ GPIO_NC_1_HV_DDI0_DDC_SDA, 0 },
-	{ GPIO_NC_2_HV_DDI0_DDC_SCL, 0 },
-	{ GPIO_NC_3_PANEL0_VDDEN, 0 },
-	{ GPIO_NC_4_PANEL0_BLKEN, 0 },
-	{ GPIO_NC_5_PANEL0_BLKCTL, 0 },
-	{ GPIO_NC_6_PCONF0, 0 },
-	{ GPIO_NC_7_PCONF0, 0 },
-	{ GPIO_NC_8_PCONF0, 0 },
-	{ GPIO_NC_9_PCONF0, 0 },
-	{ GPIO_NC_10_PCONF0, 0},
-	{ GPIO_NC_11_PCONF0, 0}
+static struct gpio_table vlv_gpio_table[] = {
+	{ VLV_GPIO_NC_0_HV_DDI0_HPD },
+	{ VLV_GPIO_NC_1_HV_DDI0_DDC_SDA },
+	{ VLV_GPIO_NC_2_HV_DDI0_DDC_SCL },
+	{ VLV_GPIO_NC_3_PANEL0_VDDEN },
+	{ VLV_GPIO_NC_4_PANEL0_BLKEN },
+	{ VLV_GPIO_NC_5_PANEL0_BLKCTL },
+	{ VLV_GPIO_NC_6_PCONF0 },
+	{ VLV_GPIO_NC_7_PCONF0 },
+	{ VLV_GPIO_NC_8_PCONF0 },
+	{ VLV_GPIO_NC_9_PCONF0 },
+	{ VLV_GPIO_NC_10_PCONF0 },
+	{ VLV_GPIO_NC_11_PCONF0 },
 };
 
 static inline enum port intel_dsi_seq_port_to_port(u8 port)
@@ -192,7 +192,7 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
 	u16 function, pad;
 	u8 port;
 
-	if (gpio_index >= ARRAY_SIZE(gtable)) {
+	if (gpio_index >= ARRAY_SIZE(vlv_gpio_table)) {
 		DRM_DEBUG_KMS("unknown gpio %u\n", gpio_index);
 		return;
 	}
@@ -213,15 +213,15 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
 		port = IOSF_PORT_GPIO_NC;
 	}
 
-	function = gtable[gpio_index].function_reg;
+	function = vlv_gpio_table[gpio_index].function_reg;
 	pad = VLV_FUNCTION_TO_PAD_REG(function);
 
 	mutex_lock(&dev_priv->sb_lock);
-	if (!gtable[gpio_index].init) {
+	if (!vlv_gpio_table[gpio_index].init) {
 		/* program the function */
 		/* FIXME: remove constant below */
 		vlv_iosf_sb_write(dev_priv, port, function, 0x2000CC00);
-		gtable[gpio_index].init = 1;
+		vlv_gpio_table[gpio_index].init = true;
 	}
 
 	val = 0x4 | action;
-- 
2.1.4

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  parent reply	other threads:[~2016-03-17 15:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-17 15:04 [PATCH 0/8] drm/i915/dsi: improved gpio element support for vlv/chv Jani Nikula
2016-03-17 15:04 ` [PATCH 1/8] drm/i915/dsi: refer to gpio index instead of gpio to avoid confusion Jani Nikula
2016-03-17 15:04 ` [PATCH 2/8] drm/i915/dsi: add support for DSI sequence block v2 gpio element Jani Nikula
2016-03-17 15:12   ` Ville Syrjälä
2016-03-17 15:04 ` [PATCH 3/8] drm/i915/dsi: do not define VLV gpio pad registers separately Jani Nikula
2016-03-17 15:32   ` Ville Syrjälä
2016-03-17 15:04 ` [PATCH 4/8] drm/i915/dsi: abstract VLV gpio element execution to a separate function Jani Nikula
2016-03-17 15:04 ` Jani Nikula [this message]
2016-03-17 15:04 ` [PATCH 6/8] drm/i915/dsi: add support for sequence block v3 gpio for VLV Jani Nikula
2016-03-17 15:04 ` [PATCH 7/8] drm/i915/chv: add more IOSF port definitions Jani Nikula
2016-03-17 15:04 ` [PATCH 8/8] drm/i915/dsi: add support for gpio elements on CHV Jani Nikula
2016-03-18  7:27 ` ✗ Fi.CI.BAT: failure for drm/i915/dsi: improved gpio element support for vlv/chv Patchwork

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