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From: Simon Horman <horms+renesas@verge.net.au>
To: linux-renesas-soc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
	Magnus Damm <magnus.damm@gmail.com>,
	Biju Das <biju.das@bp.renesas.com>,
	Simon Horman <horms+renesas@verge.net.au>
Subject: [PATCH 10/34] ARM: dts: r8a7744: Add I2C and IIC support
Date: Thu,  6 Dec 2018 13:58:05 -0800	[thread overview]
Message-ID: <fb64de56dfd9e8efe05d12adca7e2885ce1b9e17.1544125558.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1544125558.git.horms+renesas@verge.net.au>

From: Biju Das <biju.das@bp.renesas.com>

Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7744.dtsi | 127 ++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 125 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 1fe694d0215b..57e0be34b989 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -310,19 +310,142 @@
 			reg = <0 0xe6300000 0 0x40000>;
 		};
 
+		/* The memory map in the User's Manual maps the cores to
+		 * bus numbers
+		 */
+		i2c0: i2c@e6508000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6508000 0 0x40>;
+			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 931>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 931>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@e6518000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6518000 0 0x40>;
+			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 930>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 930>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
 		i2c2: i2c@e6530000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
 			reg = <0 0xe6530000 0 0x40>;
-			/* placeholder */
+			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 929>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 929>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@e6540000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6540000 0 0x40>;
+			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 928>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 928>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@e6520000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6520000 0 0x40>;
+			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 927>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 927>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
 		};
 
 		i2c5: i2c@e6528000 {
 			/* doesn't need pinmux */
 			#address-cells = <1>;
 			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
 			reg = <0 0xe6528000 0 0x40>;
-			/* placeholder */
+			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 925>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 925>;
+			i2c-scl-internal-delay-ns = <110>;
+			status = "disabled";
+		};
+
+		iic0: i2c@e6500000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,iic-r8a7744",
+				     "renesas,rcar-gen2-iic",
+				     "renesas,rmobile-iic";
+			reg = <0 0xe6500000 0 0x425>;
+			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 318>;
+			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+			       <&dmac1 0x61>, <&dmac1 0x62>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 318>;
+			status = "disabled";
+		};
+
+		iic1: i2c@e6510000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,iic-r8a7744",
+				     "renesas,rcar-gen2-iic",
+				     "renesas,rmobile-iic";
+			reg = <0 0xe6510000 0 0x425>;
+			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 323>;
+			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+			       <&dmac1 0x65>, <&dmac1 0x66>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 323>;
+			status = "disabled";
+		};
+
+		iic3: i2c@e60b0000 {
+			/* doesn't need pinmux */
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,iic-r8a7744";
+			reg = <0 0xe60b0000 0 0x425>;
+			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 926>;
+			dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+			       <&dmac1 0x77>, <&dmac1 0x78>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 926>;
+			status = "disabled";
 		};
 
 		hsusb: usb@e6590000 {
-- 
2.11.0

WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms+renesas@verge.net.au>
To: linux-renesas-soc@vger.kernel.org
Cc: Simon Horman <horms+renesas@verge.net.au>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Biju Das <biju.das@bp.renesas.com>
Subject: [PATCH 10/34] ARM: dts: r8a7744: Add I2C and IIC support
Date: Thu,  6 Dec 2018 13:58:05 -0800	[thread overview]
Message-ID: <fb64de56dfd9e8efe05d12adca7e2885ce1b9e17.1544125558.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1544125558.git.horms+renesas@verge.net.au>

From: Biju Das <biju.das@bp.renesas.com>

Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7744.dtsi | 127 ++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 125 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 1fe694d0215b..57e0be34b989 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -310,19 +310,142 @@
 			reg = <0 0xe6300000 0 0x40000>;
 		};
 
+		/* The memory map in the User's Manual maps the cores to
+		 * bus numbers
+		 */
+		i2c0: i2c@e6508000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6508000 0 0x40>;
+			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 931>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 931>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@e6518000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6518000 0 0x40>;
+			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 930>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 930>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
 		i2c2: i2c@e6530000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
 			reg = <0 0xe6530000 0 0x40>;
-			/* placeholder */
+			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 929>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 929>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@e6540000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6540000 0 0x40>;
+			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 928>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 928>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@e6520000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
+			reg = <0 0xe6520000 0 0x40>;
+			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 927>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 927>;
+			i2c-scl-internal-delay-ns = <6>;
+			status = "disabled";
 		};
 
 		i2c5: i2c@e6528000 {
 			/* doesn't need pinmux */
 			#address-cells = <1>;
 			#size-cells = <0>;
+			compatible = "renesas,i2c-r8a7744",
+				     "renesas,rcar-gen2-i2c";
 			reg = <0 0xe6528000 0 0x40>;
-			/* placeholder */
+			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 925>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 925>;
+			i2c-scl-internal-delay-ns = <110>;
+			status = "disabled";
+		};
+
+		iic0: i2c@e6500000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,iic-r8a7744",
+				     "renesas,rcar-gen2-iic",
+				     "renesas,rmobile-iic";
+			reg = <0 0xe6500000 0 0x425>;
+			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 318>;
+			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+			       <&dmac1 0x61>, <&dmac1 0x62>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 318>;
+			status = "disabled";
+		};
+
+		iic1: i2c@e6510000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,iic-r8a7744",
+				     "renesas,rcar-gen2-iic",
+				     "renesas,rmobile-iic";
+			reg = <0 0xe6510000 0 0x425>;
+			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 323>;
+			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+			       <&dmac1 0x65>, <&dmac1 0x66>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 323>;
+			status = "disabled";
+		};
+
+		iic3: i2c@e60b0000 {
+			/* doesn't need pinmux */
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,iic-r8a7744";
+			reg = <0 0xe60b0000 0 0x425>;
+			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 926>;
+			dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+			       <&dmac1 0x77>, <&dmac1 0x78>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 926>;
+			status = "disabled";
 		};
 
 		hsusb: usb@e6590000 {
-- 
2.11.0


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  parent reply	other threads:[~2018-12-06 21:58 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-06 21:58 [GIT PULL] Second Round of Renesas ARM Based SoC DT Updates for v4.21 Simon Horman
2018-12-06 21:58 ` Simon Horman
2018-12-06 21:57 ` [PATCH 01/34] ARM: dts: r8a7743: Remove legacy "renesas,rcar-thermal" compatibility Simon Horman
2018-12-06 21:57   ` [PATCH 01/34] ARM: dts: r8a7743: Remove legacy "renesas, rcar-thermal" compatibility Simon Horman
2018-12-06 21:57 ` [PATCH 02/34] ARM: dts: r8a7744-iwg20m: Add iWave RZ/G1N Qseven SOM Simon Horman
2018-12-06 21:57   ` Simon Horman
2018-12-06 21:57 ` [PATCH 03/34] ARM: dts: r8a7744: Initial SoC device tree Simon Horman
2018-12-06 21:57   ` Simon Horman
2018-12-06 21:57 ` [PATCH 04/34] ARM: dts: r8a7744-iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1N Simon Horman
2018-12-06 21:57   ` Simon Horman
2018-12-06 21:58 ` [PATCH 05/34] ARM: dts: r8a7744: Add SYS-DMAC support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 06/34] ARM: dts: r8a7744: Add GPIO support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 07/34] ARM: dts: r8a7744: Add Ethernet AVB support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 08/34] ARM: dts: r8a7744: Add SMP support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 09/34] ARM: dts: r8a7744: Add [H]SCIF{A|B} support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` Simon Horman [this message]
2018-12-06 21:58   ` [PATCH 10/34] ARM: dts: r8a7744: Add I2C and IIC support Simon Horman
2018-12-06 21:58 ` [PATCH 11/34] ARM: dts: r8a7744: Add SDHI nodes Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 12/34] ARM: dts: r8a7744: Add MMC node Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 13/34] ARM: dts: r8a7744-iwg20m: Add eMMC support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 14/34] ARM: dts: r8a7744-iwg20m: Enable SDHI0 controller Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 15/34] ARM: dts: r8a7744: USB 2.0 host support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 16/34] ARM: dts: r8a7744: Add USB-DMAC and HSUSB device nodes Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 17/34] ARM: dts: r8a7744: Add RWDT node Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 18/34] ARM: dts: r8a7744: Add audio support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 19/34] ARM: dts: r8a7744: Add CAN support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 20/34] ARM: dts: r8a7744: Add IRQC support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 21/34] ARM: dts: r8a7744: Add thermal device to DT Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 22/34] ARM: dts: r8a7744: Add CMT SoC specific support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 23/34] ARM: dts: r8a7744: add VIN dt support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 24/34] ARM: dts: r8a7744: Add VSP support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 25/34] ARM: dts: r8a7744: Add IPMMU DT nodes Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 26/34] ARM: dts: r8a7744: Add PWM SoC support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 27/34] ARM: dts: r8a7744: Add TPU support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 28/34] ARM: dts: r8a7744-iwg20d-q7-dbcm-ca: Add device tree for camera DB Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 29/34] ARM: dts: r8a7744: Add QSPI support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 30/34] ARM: dts: r8a7744: Add MSIOF[012] support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 31/34] ARM: dts: r8a7744: Add xhci support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 32/34] ARM: dts: r8a7744: Add PCIe Controller device node Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 33/34] ARM: dts: iwg20d-q7-common: Move cmt/rwdt node out of RZ/G1M SOM Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-06 21:58 ` [PATCH 34/34] ARM: dts: r8a7744-iwg20m: Add SPI NOR support Simon Horman
2018-12-06 21:58   ` Simon Horman
2018-12-11 16:04 ` [GIT PULL] Second Round of Renesas ARM Based SoC DT Updates for v4.21 Olof Johansson
2018-12-11 16:04   ` Olof Johansson

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