[GIT PULL] RISC-V Fixes for 5.18

[Palmer Dabbelt <palmer@rivosinc.com>]

The following changes since commit c6fe81191bd74f7e6ae9ce96a4837df9485f3ab8:

  RISC-V: relocate DTB if it's outside memory region (2022-04-29 07:59:18 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.18-rc8

for you to fetch changes up to c932edeaf6d6e6cc25088e61c3fcf585c30497c0:

  riscv: dts: microchip: fix gpio1 reg property typo (2022-05-19 16:47:29 -0700)

----------------------------------------------------------------
RISC-V Fixes for 5.18

* A fix for the fu540-c000 device tree to avoid a schema check failure
  on the DMA node name.
* A fix to the PolarFire SOC device tree for a typo.

----------------------------------------------------------------
Neither of these is particularly high impact so no big deal if it's too late
for 5.18, but I figured there's no reason to wait as they're also very unlikely
to break anything.

----------------------------------------------------------------
Conor Paxton (1):
      riscv: dts: microchip: fix gpio1 reg property typo

Krzysztof Kozlowski (1):
      riscv: dts: sifive: fu540-c000: align dma node name with dtschema

 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +-
 arch/riscv/boot/dts/sifive/fu540-c000.dtsi        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)