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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=PvBOcBzyg+eaLhpr35x3ip38QjdZlKmVc5mM+8taPHE=; b=BJuNdSLf4/OtdFAxSCabD+3jV+NKK5Pr2OUKhjytSwoOydBov0fYu4tLFtonrOq7SP XCtutlhtyPrHrfWC6pRGXy1flwa6yDzcjL/QMngmiSMPS00YJl+tlqD7bX2z0VP++jX7 /FjzpA7hWdoUIuMYariuDfQHYsOhZhiA/pTSiGwRfx+/Zm/dvDtLMPjlhpXIs8ATeMhs RNLs4yqGnC3+YP9zO4mgzeAHjDJ/f+1ceKknAhn90d5i1/CK1aJ1Vj+H4elvhYMnvqQr QUj07KoCTq7qzjeNVTjkt6oIl1N12WaxpZdk4vAj2R2fssJFAjOY/7a6kjW8r3hoPzmC h+dw== X-Gm-Message-State: AOAM5308M1+lIhC/XRakLIKnNDvXXB7b3xYe3na78McOeG4JLiNW9pXf vZnrNZx+3qefoHDzRNu8kP9UuDm3IHAOlX3iEubopQ== X-Google-Smtp-Source: ABdhPJyxBFnoi5YnxmRXEWi3RyOT8zK9WD++uul35NAXdT0Y4CBYSq0+BgknePDAlzmhd8jRWTJRg0Pw5651ggprPVM= X-Received: by 2002:a05:6e02:1348:: with SMTP id k8mr20739743ilr.154.1605811227390; Thu, 19 Nov 2020 10:40:27 -0800 (PST) MIME-Version: 1.0 References: <20201119080002.100342-1-tmaimon77@gmail.com> In-Reply-To: <20201119080002.100342-1-tmaimon77@gmail.com> From: Benjamin Fair Date: Thu, 19 Nov 2020 10:39:48 -0800 Message-ID: Subject: Re: [PATCH v1] ARM: dts: add Nuvoton NPCM730 device tree To: Tomer Maimon List-Id: Cc: Joel Stanley , Arnd Bergmann , olof@lixom.net, arm@kernel.org, soc@kernel.org, avifishman70@gmail.com, Rob Herring , mark.rutland@arm.com, Nancy Yuen , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, OpenBMC Maillist Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Message-ID: <20201119183948.HOug4UfIxiT2ep8KZ6G0GfHGk2qr7LqD_asqOyyTyCs@z> On Thu, 19 Nov 2020 at 00:00, Tomer Maimon wrote: > > Add Nuvoton NPCM730 SoC device tree. > > The Nuvoton NPCN730 SoC is a part of the > Nuvoton NPCM7xx SoCs family. > > Signed-off-by: Tomer Maimon Reviewed-by: Benjamin Fair > > --- > arch/arm/boot/dts/nuvoton-npcm730.dtsi | 44 ++++++++++++++++++++++++++ > 1 file changed, 44 insertions(+) > create mode 100644 arch/arm/boot/dts/nuvoton-npcm730.dtsi > > diff --git a/arch/arm/boot/dts/nuvoton-npcm730.dtsi b/arch/arm/boot/dts/nuvoton-npcm730.dtsi > new file mode 100644 > index 000000000000..86ec12ec2b50 > --- /dev/null > +++ b/arch/arm/boot/dts/nuvoton-npcm730.dtsi > @@ -0,0 +1,44 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// Copyright (c) 2020 Nuvoton Technology > + > +#include "nuvoton-common-npcm7xx.dtsi" > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&gic>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + enable-method = "nuvoton,npcm750-smp"; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + clocks = <&clk NPCM7XX_CLK_CPU>; > + clock-names = "clk_cpu"; > + reg = <0>; > + next-level-cache = <&l2>; > + }; > + > + cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + clocks = <&clk NPCM7XX_CLK_CPU>; > + clock-names = "clk_cpu"; > + reg = <1>; > + next-level-cache = <&l2>; > + }; > + }; > + > + soc { > + timer@3fe600 { > + compatible = "arm,cortex-a9-twd-timer"; > + reg = <0x3fe600 0x20>; > + interrupts = + IRQ_TYPE_LEVEL_HIGH)>; > + clocks = <&clk NPCM7XX_CLK_AHB>; > + }; > + }; > +}; > -- > 2.22.0 >