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Fri, 30 Jul 2021 15:02:45 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m9Tte-00942R-LS for linux-arm-kernel@lists.infradead.org; Fri, 30 Jul 2021 14:54:00 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 36DE360F46; Fri, 30 Jul 2021 14:53:58 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1m9Ttc-0021kH-2x; Fri, 30 Jul 2021 15:53:56 +0100 Date: Fri, 30 Jul 2021 15:53:55 +0100 Message-ID: <87y29n26po.wl-maz@kernel.org> From: Marc Zyngier To: Linus Walleij List-Id: Cc: Bert Vermeulen , Catalin Marinas , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-kernel , Linux ARM , Arnd Bergmann , Olof Johansson , SoC Team , Rob Herring , John Crispin , Felix Fietkau Subject: Re: [PATCH 3/5] ARM: dts: Add basic support for EcoNet EN7523 In-Reply-To: References: <20210730134552.853350-1-bert@biot.com> <20210730134552.853350-4-bert@biot.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linus.walleij@linaro.org, bert@biot.com, catalin.marinas@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, soc@kernel.org, robh+dt@kernel.org, john@phrozen.org, nbd@nbd.name X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210730_075358_806091_9F5481E8 X-CRM114-Status: GOOD ( 24.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Message-ID: <20210730145355.DNknVmm0WKTTCko-LtJSuF-rhInf0h3BWAu454q5pqo@z> On Fri, 30 Jul 2021 15:31:36 +0100, Linus Walleij wrote: > > Paging Marc Z and Catalin just so they can see this: > > On Fri, Jul 30, 2021 at 3:49 PM Bert Vermeulen wrote: > > > From: John Crispin > > > > Add basic support for EcoNet EN7523, enough for booting to console. > > > > The UART is basically 8250-compatible, except for the clock selection. > > A clock-frequency value is synthesized to get this to run at 115200 bps. > > > > Signed-off-by: John Crispin > > Signed-off-by: Bert Vermeulen > (...) > > + gic: interrupt-controller@09000000 { > > + compatible = "arm,gic-v3"; > > + interrupt-controller; > > + #interrupt-cells = <3>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + reg = <0x09000000 0x20000>, > > + <0x09080000 0x80000>; > > + interrupts = ; > > + > > + its: gic-its@09020000 { > > + compatible = "arm,gic-v3-its"; > > + msi-controller; > > + #msi-cell = <1>; > > + reg = <0x090200000 0x20000>; > > + }; > > + }; > > Yup GICv3 on ARM32-only silicon. Hey, why not. But that's very unlikely, as Cortex-A7 doesn't have a GICv3 CPU interface built in (it only has the memory mapped version), and A53/57 were the first CPUs to ever support GICv3. I don't believe the description of the CPU in the DT is accurate. Bert, please send a kernel boot log. > > > + timer { > > + compatible = "arm,armv8-timer"; > > + interrupt-parent = <&gic>; > > + interrupts = , > > + , > > + , > > + ; Copy paste bug. These are not valid intspecs for GICv3. > > + clock-frequency = <25000000>; > > + }; > > Also arm,armv8-timer on ARM32-only silicon. Probably because that's not what it actually is. My bet is on A53 with a crippled firmware. > This is kind of a first. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel