* [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
@ 2021-10-26 20:00 Konstantin Aladyshev
2021-10-26 20:00 ` Konstantin Aladyshev
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Konstantin Aladyshev @ 2021-10-26 20:00 UTC (permalink / raw)
Cc: supreeth.venkatesh, aladyshev22, Arnd Bergmann, Olof Johansson,
soc, Rob Herring, Joel Stanley, Andrew Jeffery, linux-arm-kernel,
devicetree, linux-kernel, linux-aspeed
Add initial version of device tree for the BMC in the AMD DaytonaX
platform.
AMD DaytonaX platform is a customer reference board (CRB) with an
Aspeed ast2500 BMC manufactured by AMD.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts | 327 ++++++++++++++++++
2 files changed, 328 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e0934180724..01cfd803d273 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1457,6 +1457,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2600-evb-a1.dtb \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-ethanolx.dtb \
+ aspeed-bmc-amd-daytonax.dtb \
aspeed-bmc-ampere-mtjade.dtb \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
new file mode 100644
index 000000000000..93ad4262a786
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020 AMD Inc.
+// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "AMD DaytonaX BMC";
+ compatible = "amd,daytonax-bmc", "aspeed,ast2500";
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+
+ aliases {
+ serial0 = &uart1;
+ serial4 = &uart5;
+ };
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlycon";
+ };
+ leds {
+ compatible = "gpio-leds";
+
+ fault {
+ gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ identify {
+ gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
+ };
+ };
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
+ <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
+ <&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>,
+ <&adc 15>;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ #include "openbmc-flash-layout.dtsi"
+ };
+};
+
+
+&mac0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
+ <&syscon ASPEED_CLK_MAC1RCLK>;
+ clock-names = "MACCLK", "RCLK";
+};
+
+&uart1 {
+ //Host Console
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default>;
+};
+
+&uart5 {
+ //BMC Console
+ status = "okay";
+};
+
+&adc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0_default
+ &pinctrl_adc1_default
+ &pinctrl_adc2_default
+ &pinctrl_adc4_default
+ &pinctrl_adc5_default
+ &pinctrl_adc6_default
+ &pinctrl_adc7_default
+ &pinctrl_adc8_default
+ &pinctrl_adc9_default
+ &pinctrl_adc10_default
+ &pinctrl_adc11_default
+ &pinctrl_adc12_default
+ &pinctrl_adc13_default
+ &pinctrl_adc14_default
+ &pinctrl_adc15_default>;
+};
+
+&gpio {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "","","FAULT_LED","","","","","",
+ /*B0-B7*/ "","","","","","","","",
+ /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
+ /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
+ /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
+ "MON_P0_PWR_GOOD","MON_PWROK","",
+ /*F0-F7*/ "","","","","","","","",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","","","",
+ /*S0-S7*/ "","","","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","","","","","","","",
+ /*Z0-Z7*/ "","","","","","","","",
+ /*AA0-AA7*/ "","","","","","","","",
+ /*AB0-AB7*/ "","","","","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&kcs1 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x60>;
+};
+
+&kcs2 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x62>;
+};
+
+&kcs3 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0xCA2>;
+};
+
+&kcs4 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x97DE>;
+};
+
+&lpc_snoop {
+ status = "okay";
+ snoop-ports = <0x80>, <0x81>;
+};
+
+&lpc_ctrl {
+ //Enable lpc clock
+ status = "okay";
+};
+
+&pwm_tacho {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default
+ &pinctrl_pwm1_default
+ &pinctrl_pwm2_default
+ &pinctrl_pwm3_default
+ &pinctrl_pwm4_default
+ &pinctrl_pwm5_default
+ &pinctrl_pwm6_default
+ &pinctrl_pwm7_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan@2 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan@3 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+ };
+
+ fan@4 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+ };
+
+ fan@5 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+ };
+
+ fan@6 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06>;
+ };
+
+ fan@7 {
+ reg = <0x07>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x07>;
+ };
+
+ fan@8 {
+ reg = <0x08>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08>;
+ };
+
+ fan@9 {
+ reg = <0x09>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan@10 {
+ reg = <0x0a>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
+ };
+
+ fan@11 {
+ reg = <0x0b>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
+ };
+
+ fan@12 {
+ reg = <0x0c>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan@13 {
+ reg = <0x0d>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
+ };
+
+ fan@14 {
+ reg = <0x0e>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
+ };
+
+ fan@15 {
+ reg = <0x0f>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
+ };
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
+};
+
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-26 20:00 [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC Konstantin Aladyshev
2021-10-26 20:00 ` Konstantin Aladyshev
@ 2021-10-26 20:00 ` Konstantin Aladyshev
2021-10-26 21:03 ` Joel Stanley
2 siblings, 0 replies; 12+ messages in thread
From: Konstantin Aladyshev @ 2021-10-26 20:00 UTC (permalink / raw)
Cc: supreeth.venkatesh, aladyshev22, Arnd Bergmann, Olof Johansson,
soc, Rob Herring, Joel Stanley, Andrew Jeffery, linux-arm-kernel,
devicetree, linux-kernel, linux-aspeed
Add initial version of device tree for the BMC in the AMD DaytonaX
platform.
AMD DaytonaX platform is a customer reference board (CRB) with an
Aspeed ast2500 BMC manufactured by AMD.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts | 327 ++++++++++++++++++
2 files changed, 328 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e0934180724..01cfd803d273 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1457,6 +1457,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2600-evb-a1.dtb \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-ethanolx.dtb \
+ aspeed-bmc-amd-daytonax.dtb \
aspeed-bmc-ampere-mtjade.dtb \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
new file mode 100644
index 000000000000..93ad4262a786
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020 AMD Inc.
+// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "AMD DaytonaX BMC";
+ compatible = "amd,daytonax-bmc", "aspeed,ast2500";
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+
+ aliases {
+ serial0 = &uart1;
+ serial4 = &uart5;
+ };
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlycon";
+ };
+ leds {
+ compatible = "gpio-leds";
+
+ fault {
+ gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ identify {
+ gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
+ };
+ };
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
+ <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
+ <&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>,
+ <&adc 15>;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ #include "openbmc-flash-layout.dtsi"
+ };
+};
+
+
+&mac0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
+ <&syscon ASPEED_CLK_MAC1RCLK>;
+ clock-names = "MACCLK", "RCLK";
+};
+
+&uart1 {
+ //Host Console
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default>;
+};
+
+&uart5 {
+ //BMC Console
+ status = "okay";
+};
+
+&adc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0_default
+ &pinctrl_adc1_default
+ &pinctrl_adc2_default
+ &pinctrl_adc4_default
+ &pinctrl_adc5_default
+ &pinctrl_adc6_default
+ &pinctrl_adc7_default
+ &pinctrl_adc8_default
+ &pinctrl_adc9_default
+ &pinctrl_adc10_default
+ &pinctrl_adc11_default
+ &pinctrl_adc12_default
+ &pinctrl_adc13_default
+ &pinctrl_adc14_default
+ &pinctrl_adc15_default>;
+};
+
+&gpio {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "","","FAULT_LED","","","","","",
+ /*B0-B7*/ "","","","","","","","",
+ /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
+ /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
+ /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
+ "MON_P0_PWR_GOOD","MON_PWROK","",
+ /*F0-F7*/ "","","","","","","","",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","","","",
+ /*S0-S7*/ "","","","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","","","","","","","",
+ /*Z0-Z7*/ "","","","","","","","",
+ /*AA0-AA7*/ "","","","","","","","",
+ /*AB0-AB7*/ "","","","","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&kcs1 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x60>;
+};
+
+&kcs2 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x62>;
+};
+
+&kcs3 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0xCA2>;
+};
+
+&kcs4 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x97DE>;
+};
+
+&lpc_snoop {
+ status = "okay";
+ snoop-ports = <0x80>, <0x81>;
+};
+
+&lpc_ctrl {
+ //Enable lpc clock
+ status = "okay";
+};
+
+&pwm_tacho {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default
+ &pinctrl_pwm1_default
+ &pinctrl_pwm2_default
+ &pinctrl_pwm3_default
+ &pinctrl_pwm4_default
+ &pinctrl_pwm5_default
+ &pinctrl_pwm6_default
+ &pinctrl_pwm7_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan@2 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan@3 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+ };
+
+ fan@4 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+ };
+
+ fan@5 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+ };
+
+ fan@6 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06>;
+ };
+
+ fan@7 {
+ reg = <0x07>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x07>;
+ };
+
+ fan@8 {
+ reg = <0x08>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08>;
+ };
+
+ fan@9 {
+ reg = <0x09>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan@10 {
+ reg = <0x0a>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
+ };
+
+ fan@11 {
+ reg = <0x0b>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
+ };
+
+ fan@12 {
+ reg = <0x0c>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan@13 {
+ reg = <0x0d>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
+ };
+
+ fan@14 {
+ reg = <0x0e>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
+ };
+
+ fan@15 {
+ reg = <0x0f>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
+ };
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
+};
+
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-26 20:00 [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC Konstantin Aladyshev
@ 2021-10-26 20:00 ` Konstantin Aladyshev
2021-10-26 20:00 ` Konstantin Aladyshev
2021-10-26 21:03 ` Joel Stanley
2 siblings, 0 replies; 12+ messages in thread
From: Konstantin Aladyshev @ 2021-10-26 20:00 UTC (permalink / raw)
Cc: supreeth.venkatesh, aladyshev22, Arnd Bergmann, Olof Johansson,
soc, Rob Herring, Joel Stanley, Andrew Jeffery, linux-arm-kernel,
devicetree, linux-kernel, linux-aspeed
Add initial version of device tree for the BMC in the AMD DaytonaX
platform.
AMD DaytonaX platform is a customer reference board (CRB) with an
Aspeed ast2500 BMC manufactured by AMD.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts | 327 ++++++++++++++++++
2 files changed, 328 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e0934180724..01cfd803d273 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1457,6 +1457,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2600-evb-a1.dtb \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-ethanolx.dtb \
+ aspeed-bmc-amd-daytonax.dtb \
aspeed-bmc-ampere-mtjade.dtb \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
new file mode 100644
index 000000000000..93ad4262a786
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020 AMD Inc.
+// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "AMD DaytonaX BMC";
+ compatible = "amd,daytonax-bmc", "aspeed,ast2500";
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+
+ aliases {
+ serial0 = &uart1;
+ serial4 = &uart5;
+ };
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlycon";
+ };
+ leds {
+ compatible = "gpio-leds";
+
+ fault {
+ gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ identify {
+ gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
+ };
+ };
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
+ <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
+ <&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>,
+ <&adc 15>;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ #include "openbmc-flash-layout.dtsi"
+ };
+};
+
+
+&mac0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
+ <&syscon ASPEED_CLK_MAC1RCLK>;
+ clock-names = "MACCLK", "RCLK";
+};
+
+&uart1 {
+ //Host Console
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default>;
+};
+
+&uart5 {
+ //BMC Console
+ status = "okay";
+};
+
+&adc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0_default
+ &pinctrl_adc1_default
+ &pinctrl_adc2_default
+ &pinctrl_adc4_default
+ &pinctrl_adc5_default
+ &pinctrl_adc6_default
+ &pinctrl_adc7_default
+ &pinctrl_adc8_default
+ &pinctrl_adc9_default
+ &pinctrl_adc10_default
+ &pinctrl_adc11_default
+ &pinctrl_adc12_default
+ &pinctrl_adc13_default
+ &pinctrl_adc14_default
+ &pinctrl_adc15_default>;
+};
+
+&gpio {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "","","FAULT_LED","","","","","",
+ /*B0-B7*/ "","","","","","","","",
+ /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
+ /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
+ /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
+ "MON_P0_PWR_GOOD","MON_PWROK","",
+ /*F0-F7*/ "","","","","","","","",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","","","",
+ /*S0-S7*/ "","","","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","","","","","","","",
+ /*Z0-Z7*/ "","","","","","","","",
+ /*AA0-AA7*/ "","","","","","","","",
+ /*AB0-AB7*/ "","","","","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&kcs1 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x60>;
+};
+
+&kcs2 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x62>;
+};
+
+&kcs3 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0xCA2>;
+};
+
+&kcs4 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x97DE>;
+};
+
+&lpc_snoop {
+ status = "okay";
+ snoop-ports = <0x80>, <0x81>;
+};
+
+&lpc_ctrl {
+ //Enable lpc clock
+ status = "okay";
+};
+
+&pwm_tacho {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default
+ &pinctrl_pwm1_default
+ &pinctrl_pwm2_default
+ &pinctrl_pwm3_default
+ &pinctrl_pwm4_default
+ &pinctrl_pwm5_default
+ &pinctrl_pwm6_default
+ &pinctrl_pwm7_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan@2 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan@3 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+ };
+
+ fan@4 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+ };
+
+ fan@5 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+ };
+
+ fan@6 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06>;
+ };
+
+ fan@7 {
+ reg = <0x07>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x07>;
+ };
+
+ fan@8 {
+ reg = <0x08>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08>;
+ };
+
+ fan@9 {
+ reg = <0x09>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan@10 {
+ reg = <0x0a>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
+ };
+
+ fan@11 {
+ reg = <0x0b>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
+ };
+
+ fan@12 {
+ reg = <0x0c>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan@13 {
+ reg = <0x0d>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
+ };
+
+ fan@14 {
+ reg = <0x0e>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
+ };
+
+ fan@15 {
+ reg = <0x0f>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
+ };
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
+};
+
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-26 20:00 [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC Konstantin Aladyshev
2021-10-26 20:00 ` Konstantin Aladyshev
2021-10-26 20:00 ` Konstantin Aladyshev
@ 2021-10-26 21:03 ` Joel Stanley
2021-10-26 21:03 ` Joel Stanley
` (2 more replies)
2 siblings, 3 replies; 12+ messages in thread
From: Joel Stanley @ 2021-10-26 21:03 UTC (permalink / raw)
To: Konstantin Aladyshev
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed
Hello Konstantin,
On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
<aladyshev22@gmail.com> wrote:
>
> Add initial version of device tree for the BMC in the AMD DaytonaX
> platform.
>
> AMD DaytonaX platform is a customer reference board (CRB) with an
> Aspeed ast2500 BMC manufactured by AMD.
>
> Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
This looks good. I have one comment about the GPIOs below.
> +&gpio {
> + status = "okay";
> + gpio-line-names =
> + /*A0-A7*/ "","","FAULT_LED","","","","","",
> + /*B0-B7*/ "","","","","","","","",
> + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> + "MON_P0_PWR_GOOD","MON_PWROK","",
For systems that will run openbmc, we try to use naming conventions
from this document:
https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
If a GPIO is missing from that doc I encourage you to add it.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-26 21:03 ` Joel Stanley
@ 2021-10-26 21:03 ` Joel Stanley
2021-10-26 21:03 ` Joel Stanley
2021-10-27 11:05 ` Konstantin Aladyshev
2 siblings, 0 replies; 12+ messages in thread
From: Joel Stanley @ 2021-10-26 21:03 UTC (permalink / raw)
To: Konstantin Aladyshev
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed
Hello Konstantin,
On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
<aladyshev22@gmail.com> wrote:
>
> Add initial version of device tree for the BMC in the AMD DaytonaX
> platform.
>
> AMD DaytonaX platform is a customer reference board (CRB) with an
> Aspeed ast2500 BMC manufactured by AMD.
>
> Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
This looks good. I have one comment about the GPIOs below.
> +&gpio {
> + status = "okay";
> + gpio-line-names =
> + /*A0-A7*/ "","","FAULT_LED","","","","","",
> + /*B0-B7*/ "","","","","","","","",
> + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> + "MON_P0_PWR_GOOD","MON_PWROK","",
For systems that will run openbmc, we try to use naming conventions
from this document:
https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
If a GPIO is missing from that doc I encourage you to add it.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-26 21:03 ` Joel Stanley
2021-10-26 21:03 ` Joel Stanley
@ 2021-10-26 21:03 ` Joel Stanley
2021-10-27 11:05 ` Konstantin Aladyshev
2 siblings, 0 replies; 12+ messages in thread
From: Joel Stanley @ 2021-10-26 21:03 UTC (permalink / raw)
To: Konstantin Aladyshev
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed
Hello Konstantin,
On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
<aladyshev22@gmail.com> wrote:
>
> Add initial version of device tree for the BMC in the AMD DaytonaX
> platform.
>
> AMD DaytonaX platform is a customer reference board (CRB) with an
> Aspeed ast2500 BMC manufactured by AMD.
>
> Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
This looks good. I have one comment about the GPIOs below.
> +&gpio {
> + status = "okay";
> + gpio-line-names =
> + /*A0-A7*/ "","","FAULT_LED","","","","","",
> + /*B0-B7*/ "","","","","","","","",
> + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> + "MON_P0_PWR_GOOD","MON_PWROK","",
For systems that will run openbmc, we try to use naming conventions
from this document:
https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
If a GPIO is missing from that doc I encourage you to add it.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-26 21:03 ` Joel Stanley
2021-10-26 21:03 ` Joel Stanley
2021-10-26 21:03 ` Joel Stanley
@ 2021-10-27 11:05 ` Konstantin Aladyshev
2021-10-27 11:05 ` Konstantin Aladyshev
` (2 more replies)
2 siblings, 3 replies; 12+ messages in thread
From: Konstantin Aladyshev @ 2021-10-27 11:05 UTC (permalink / raw)
To: Joel Stanley
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed, geissonator
Thanks for the comments. Can I ask you some questions about this
`device-tree-gpio-naming.md`?
1) First of all in my naming I've tried to use naming scheme the same
as the EthanolX CRB DTS currently has
(https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102).
Do you want me to change GPIO naming in the EthanolX CRB as well?
2) Also this naming comes from the signal names in the board
schematics. This way it is clear to check schematics vs DTS. If we use
this OpenBMC naming style, we will lose that correspondence. Is it
really good?
3) In the initial version of the DTS file I've supplied only a minimal
set of GPIO, that are used by OpenBMC. GPIOs for x86-power-control app
and led id/fault gpios. With renaming these GPIOs I'm only sure about
these GPIOs:
FAULT_LED - led-fault
CHASSIS_ID_BTN - led-identify
What about the rest? For example the document doesn't really state
what the *-button postfix states? Is it for asserting or monitoring
buttons? How should I name these signals?
ASSERT_BMC_READY
ASSERT_RST_BTN
ASSERT_PWR_BTN
MON_P0_RST_BTN
MON_P0_PWR_BTN
MON_P0_PWR_GOOD
MON_PWROK
Can you help me with those?
4) And what should I do to the board GPIO signals that OpenBMC doesn't
use? If you look at the EthanolX CRB DTS
(https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102)
it has a ton of GPIOs. Should they be renamed to this OpenBMC style as
well? Or can they be named exactly like in the schematics?
I've also CCed original author of the `device-tree-gpio-naming.md`
document Andrew Geissler. Andrew, can you please provide your opinion
on the subject?
Best regards,
Konstantin Aladyshev
On Wed, Oct 27, 2021 at 12:03 AM Joel Stanley <joel@jms.id.au> wrote:
>
> Hello Konstantin,
>
> On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
> <aladyshev22@gmail.com> wrote:
> >
> > Add initial version of device tree for the BMC in the AMD DaytonaX
> > platform.
> >
> > AMD DaytonaX platform is a customer reference board (CRB) with an
> > Aspeed ast2500 BMC manufactured by AMD.
> >
> > Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
>
> This looks good. I have one comment about the GPIOs below.
>
> > +&gpio {
> > + status = "okay";
> > + gpio-line-names =
> > + /*A0-A7*/ "","","FAULT_LED","","","","","",
> > + /*B0-B7*/ "","","","","","","","",
> > + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> > + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> > + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> > + "MON_P0_PWR_GOOD","MON_PWROK","",
>
> For systems that will run openbmc, we try to use naming conventions
> from this document:
>
> https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
>
> If a GPIO is missing from that doc I encourage you to add it.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-27 11:05 ` Konstantin Aladyshev
@ 2021-10-27 11:05 ` Konstantin Aladyshev
2021-10-27 11:05 ` Konstantin Aladyshev
2021-11-16 6:07 ` Joel Stanley
2 siblings, 0 replies; 12+ messages in thread
From: Konstantin Aladyshev @ 2021-10-27 11:05 UTC (permalink / raw)
To: Joel Stanley
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed, geissonator
Thanks for the comments. Can I ask you some questions about this
`device-tree-gpio-naming.md`?
1) First of all in my naming I've tried to use naming scheme the same
as the EthanolX CRB DTS currently has
(https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102).
Do you want me to change GPIO naming in the EthanolX CRB as well?
2) Also this naming comes from the signal names in the board
schematics. This way it is clear to check schematics vs DTS. If we use
this OpenBMC naming style, we will lose that correspondence. Is it
really good?
3) In the initial version of the DTS file I've supplied only a minimal
set of GPIO, that are used by OpenBMC. GPIOs for x86-power-control app
and led id/fault gpios. With renaming these GPIOs I'm only sure about
these GPIOs:
FAULT_LED - led-fault
CHASSIS_ID_BTN - led-identify
What about the rest? For example the document doesn't really state
what the *-button postfix states? Is it for asserting or monitoring
buttons? How should I name these signals?
ASSERT_BMC_READY
ASSERT_RST_BTN
ASSERT_PWR_BTN
MON_P0_RST_BTN
MON_P0_PWR_BTN
MON_P0_PWR_GOOD
MON_PWROK
Can you help me with those?
4) And what should I do to the board GPIO signals that OpenBMC doesn't
use? If you look at the EthanolX CRB DTS
(https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102)
it has a ton of GPIOs. Should they be renamed to this OpenBMC style as
well? Or can they be named exactly like in the schematics?
I've also CCed original author of the `device-tree-gpio-naming.md`
document Andrew Geissler. Andrew, can you please provide your opinion
on the subject?
Best regards,
Konstantin Aladyshev
On Wed, Oct 27, 2021 at 12:03 AM Joel Stanley <joel@jms.id.au> wrote:
>
> Hello Konstantin,
>
> On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
> <aladyshev22@gmail.com> wrote:
> >
> > Add initial version of device tree for the BMC in the AMD DaytonaX
> > platform.
> >
> > AMD DaytonaX platform is a customer reference board (CRB) with an
> > Aspeed ast2500 BMC manufactured by AMD.
> >
> > Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
>
> This looks good. I have one comment about the GPIOs below.
>
> > +&gpio {
> > + status = "okay";
> > + gpio-line-names =
> > + /*A0-A7*/ "","","FAULT_LED","","","","","",
> > + /*B0-B7*/ "","","","","","","","",
> > + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> > + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> > + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> > + "MON_P0_PWR_GOOD","MON_PWROK","",
>
> For systems that will run openbmc, we try to use naming conventions
> from this document:
>
> https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
>
> If a GPIO is missing from that doc I encourage you to add it.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-27 11:05 ` Konstantin Aladyshev
2021-10-27 11:05 ` Konstantin Aladyshev
@ 2021-10-27 11:05 ` Konstantin Aladyshev
2021-11-16 6:07 ` Joel Stanley
2 siblings, 0 replies; 12+ messages in thread
From: Konstantin Aladyshev @ 2021-10-27 11:05 UTC (permalink / raw)
To: Joel Stanley
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed, geissonator
Thanks for the comments. Can I ask you some questions about this
`device-tree-gpio-naming.md`?
1) First of all in my naming I've tried to use naming scheme the same
as the EthanolX CRB DTS currently has
(https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102).
Do you want me to change GPIO naming in the EthanolX CRB as well?
2) Also this naming comes from the signal names in the board
schematics. This way it is clear to check schematics vs DTS. If we use
this OpenBMC naming style, we will lose that correspondence. Is it
really good?
3) In the initial version of the DTS file I've supplied only a minimal
set of GPIO, that are used by OpenBMC. GPIOs for x86-power-control app
and led id/fault gpios. With renaming these GPIOs I'm only sure about
these GPIOs:
FAULT_LED - led-fault
CHASSIS_ID_BTN - led-identify
What about the rest? For example the document doesn't really state
what the *-button postfix states? Is it for asserting or monitoring
buttons? How should I name these signals?
ASSERT_BMC_READY
ASSERT_RST_BTN
ASSERT_PWR_BTN
MON_P0_RST_BTN
MON_P0_PWR_BTN
MON_P0_PWR_GOOD
MON_PWROK
Can you help me with those?
4) And what should I do to the board GPIO signals that OpenBMC doesn't
use? If you look at the EthanolX CRB DTS
(https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102)
it has a ton of GPIOs. Should they be renamed to this OpenBMC style as
well? Or can they be named exactly like in the schematics?
I've also CCed original author of the `device-tree-gpio-naming.md`
document Andrew Geissler. Andrew, can you please provide your opinion
on the subject?
Best regards,
Konstantin Aladyshev
On Wed, Oct 27, 2021 at 12:03 AM Joel Stanley <joel@jms.id.au> wrote:
>
> Hello Konstantin,
>
> On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
> <aladyshev22@gmail.com> wrote:
> >
> > Add initial version of device tree for the BMC in the AMD DaytonaX
> > platform.
> >
> > AMD DaytonaX platform is a customer reference board (CRB) with an
> > Aspeed ast2500 BMC manufactured by AMD.
> >
> > Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
>
> This looks good. I have one comment about the GPIOs below.
>
> > +&gpio {
> > + status = "okay";
> > + gpio-line-names =
> > + /*A0-A7*/ "","","FAULT_LED","","","","","",
> > + /*B0-B7*/ "","","","","","","","",
> > + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> > + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> > + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> > + "MON_P0_PWR_GOOD","MON_PWROK","",
>
> For systems that will run openbmc, we try to use naming conventions
> from this document:
>
> https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
>
> If a GPIO is missing from that doc I encourage you to add it.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-10-27 11:05 ` Konstantin Aladyshev
2021-10-27 11:05 ` Konstantin Aladyshev
2021-10-27 11:05 ` Konstantin Aladyshev
@ 2021-11-16 6:07 ` Joel Stanley
2021-11-16 6:07 ` Joel Stanley
2 siblings, 1 reply; 12+ messages in thread
From: Joel Stanley @ 2021-11-16 6:07 UTC (permalink / raw)
To: Konstantin Aladyshev, Patrick Williams
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed, Andrew Geissler
On Wed, 27 Oct 2021 at 10:59, Konstantin Aladyshev
<aladyshev22@gmail.com> wrote:
>
> Thanks for the comments. Can I ask you some questions about this
> `device-tree-gpio-naming.md`?
>
> 1) First of all in my naming I've tried to use naming scheme the same
> as the EthanolX CRB DTS currently has
> (https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102).
> Do you want me to change GPIO naming in the EthanolX CRB as well?
Yeah, that would make sense.
> 2) Also this naming comes from the signal names in the board
> schematics. This way it is clear to check schematics vs DTS. If we use
> this OpenBMC naming style, we will lose that correspondence. Is it
> really good?
This is a good point. The preference is to use human readable names
over the schematic net. I can see cases where this would be worse, but
hopefully on balance it results in consistent naming between machines.
> 3) In the initial version of the DTS file I've supplied only a minimal
> set of GPIO, that are used by OpenBMC. GPIOs for x86-power-control app
> and led id/fault gpios. With renaming these GPIOs I'm only sure about
> these GPIOs:
>
> FAULT_LED - led-fault
> CHASSIS_ID_BTN - led-identify
>
> What about the rest? For example the document doesn't really state
> what the *-button postfix states? Is it for asserting or monitoring
> buttons? How should I name these signals?
>
> ASSERT_BMC_READY
> ASSERT_RST_BTN
> ASSERT_PWR_BTN
>
> MON_P0_RST_BTN
> MON_P0_PWR_BTN
> MON_P0_PWR_GOOD
> MON_PWROK
>
> Can you help me with those?
Patrick, do you have thoughts here?
>
> 4) And what should I do to the board GPIO signals that OpenBMC doesn't
> use? If you look at the EthanolX CRB DTS
> (https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102)
> it has a ton of GPIOs. Should they be renamed to this OpenBMC style as
> well? Or can they be named exactly like in the schematics?
That's up to you.
>
> I've also CCed original author of the `device-tree-gpio-naming.md`
> document Andrew Geissler. Andrew, can you please provide your opinion
> on the subject?
I've also added Patrick, who is helping review this document.
Cheers,
Joel
>
> Best regards,
> Konstantin Aladyshev
>
> On Wed, Oct 27, 2021 at 12:03 AM Joel Stanley <joel@jms.id.au> wrote:
> >
> > Hello Konstantin,
> >
> > On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
> > <aladyshev22@gmail.com> wrote:
> > >
> > > Add initial version of device tree for the BMC in the AMD DaytonaX
> > > platform.
> > >
> > > AMD DaytonaX platform is a customer reference board (CRB) with an
> > > Aspeed ast2500 BMC manufactured by AMD.
> > >
> > > Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
> >
> > This looks good. I have one comment about the GPIOs below.
> >
> > > +&gpio {
> > > + status = "okay";
> > > + gpio-line-names =
> > > + /*A0-A7*/ "","","FAULT_LED","","","","","",
> > > + /*B0-B7*/ "","","","","","","","",
> > > + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> > > + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> > > + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> > > + "MON_P0_PWR_GOOD","MON_PWROK","",
> >
> > For systems that will run openbmc, we try to use naming conventions
> > from this document:
> >
> > https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
> >
> > If a GPIO is missing from that doc I encourage you to add it.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
2021-11-16 6:07 ` Joel Stanley
@ 2021-11-16 6:07 ` Joel Stanley
0 siblings, 0 replies; 12+ messages in thread
From: Joel Stanley @ 2021-11-16 6:07 UTC (permalink / raw)
To: Konstantin Aladyshev, Patrick Williams
Cc: Supreeth Venkatesh, Arnd Bergmann, Olof Johansson, SoC Team,
Rob Herring, Andrew Jeffery, Linux ARM, devicetree,
Linux Kernel Mailing List, linux-aspeed, Andrew Geissler
On Wed, 27 Oct 2021 at 10:59, Konstantin Aladyshev
<aladyshev22@gmail.com> wrote:
>
> Thanks for the comments. Can I ask you some questions about this
> `device-tree-gpio-naming.md`?
>
> 1) First of all in my naming I've tried to use naming scheme the same
> as the EthanolX CRB DTS currently has
> (https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102).
> Do you want me to change GPIO naming in the EthanolX CRB as well?
Yeah, that would make sense.
> 2) Also this naming comes from the signal names in the board
> schematics. This way it is clear to check schematics vs DTS. If we use
> this OpenBMC naming style, we will lose that correspondence. Is it
> really good?
This is a good point. The preference is to use human readable names
over the schematic net. I can see cases where this would be worse, but
hopefully on balance it results in consistent naming between machines.
> 3) In the initial version of the DTS file I've supplied only a minimal
> set of GPIO, that are used by OpenBMC. GPIOs for x86-power-control app
> and led id/fault gpios. With renaming these GPIOs I'm only sure about
> these GPIOs:
>
> FAULT_LED - led-fault
> CHASSIS_ID_BTN - led-identify
>
> What about the rest? For example the document doesn't really state
> what the *-button postfix states? Is it for asserting or monitoring
> buttons? How should I name these signals?
>
> ASSERT_BMC_READY
> ASSERT_RST_BTN
> ASSERT_PWR_BTN
>
> MON_P0_RST_BTN
> MON_P0_PWR_BTN
> MON_P0_PWR_GOOD
> MON_PWROK
>
> Can you help me with those?
Patrick, do you have thoughts here?
>
> 4) And what should I do to the board GPIO signals that OpenBMC doesn't
> use? If you look at the EthanolX CRB DTS
> (https://github.com/torvalds/linux/blob/d25f27432f80a800a3592db128254c8140bd71bf/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts#L102)
> it has a ton of GPIOs. Should they be renamed to this OpenBMC style as
> well? Or can they be named exactly like in the schematics?
That's up to you.
>
> I've also CCed original author of the `device-tree-gpio-naming.md`
> document Andrew Geissler. Andrew, can you please provide your opinion
> on the subject?
I've also added Patrick, who is helping review this document.
Cheers,
Joel
>
> Best regards,
> Konstantin Aladyshev
>
> On Wed, Oct 27, 2021 at 12:03 AM Joel Stanley <joel@jms.id.au> wrote:
> >
> > Hello Konstantin,
> >
> > On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
> > <aladyshev22@gmail.com> wrote:
> > >
> > > Add initial version of device tree for the BMC in the AMD DaytonaX
> > > platform.
> > >
> > > AMD DaytonaX platform is a customer reference board (CRB) with an
> > > Aspeed ast2500 BMC manufactured by AMD.
> > >
> > > Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
> >
> > This looks good. I have one comment about the GPIOs below.
> >
> > > +&gpio {
> > > + status = "okay";
> > > + gpio-line-names =
> > > + /*A0-A7*/ "","","FAULT_LED","","","","","",
> > > + /*B0-B7*/ "","","","","","","","",
> > > + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> > > + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> > > + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> > > + "MON_P0_PWR_GOOD","MON_PWROK","",
> >
> > For systems that will run openbmc, we try to use naming conventions
> > from this document:
> >
> > https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
> >
> > If a GPIO is missing from that doc I encourage you to add it.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
@ 2022-09-20 15:34 Konstantin Aladyshev
0 siblings, 0 replies; 12+ messages in thread
From: Konstantin Aladyshev @ 2022-09-20 15:34 UTC (permalink / raw)
Cc: Konstantin Aladyshev, Arnd Bergmann, Olof Johansson, soc,
Rob Herring, Krzysztof Kozlowski, Joel Stanley, Andrew Jeffery,
linux-arm-kernel, devicetree, linux-kernel, linux-aspeed
Add initial version of device tree for the BMC in the AMD DaytonaX
platform.
AMD DaytonaX platform is a customer reference board (CRB) with an
Aspeed ast2500 BMC manufactured by AMD.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts | 320 ++++++++++++++++++
arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts | 14 +-
3 files changed, 333 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 05d8aef6e5d2..9eff88d410aa 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1575,6 +1575,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2600-evb-a1.dtb \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-ethanolx.dtb \
+ aspeed-bmc-amd-daytonax.dtb \
aspeed-bmc-ampere-mtjade.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-asrock-e3c246d4i.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
new file mode 100644
index 000000000000..0e066b5ae0fb
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts
@@ -0,0 +1,320 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ model = "AMD DaytonaX BMC";
+ compatible = "amd,daytonax-bmc", "aspeed,ast2500";
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+ aliases {
+ serial0 = &uart1;
+ serial4 = &uart5;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlycon";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ fault {
+ gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ identify {
+ gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
+ <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
+ <&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>,
+ <&adc 15>;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bmc";
+ #include "openbmc-flash-layout.dtsi"
+ };
+};
+
+&mac0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
+};
+
+&uart1 {
+ //Host Console
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default
+ &pinctrl_nrts1_default
+ &pinctrl_ndtr1_default
+ &pinctrl_ndsr1_default
+ &pinctrl_ncts1_default
+ &pinctrl_ndcd1_default
+ &pinctrl_nri1_default>;
+};
+
+&uart5 {
+ //BMC Console
+ status = "okay";
+};
+
+&vuart {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x3f8>;
+ aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&adc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0_default
+ &pinctrl_adc1_default
+ &pinctrl_adc2_default
+ &pinctrl_adc3_default
+ &pinctrl_adc4_default
+ &pinctrl_adc5_default
+ &pinctrl_adc6_default
+ &pinctrl_adc7_default
+ &pinctrl_adc8_default
+ &pinctrl_adc9_default
+ &pinctrl_adc10_default
+ &pinctrl_adc11_default
+ &pinctrl_adc12_default
+ &pinctrl_adc13_default
+ &pinctrl_adc14_default
+ &pinctrl_adc15_default>;
+};
+
+&gpio {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "","","led-fault","led-identify","","","","",
+ /*B0-B7*/ "","","","","","","","",
+ /*C0-C7*/ "id-button","","","","","","","",
+ /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
+ /*E0-E7*/ "reset-button","reset-control","power-button","power-control","",
+ "power-good","power-ok","",
+ /*F0-F7*/ "","","","","","","BATTERY_DETECT","",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","","","",
+ /*S0-S7*/ "","","","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","","","","","","","",
+ /*Z0-Z7*/ "","","","","","","","",
+ /*AA0-AA7*/ "","","","","","","","",
+ /*AB0-AB7*/ "FM_BMC_READ_SPD_TEMP","","","","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&kcs3 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0xca2>;
+};
+
+&lpc_snoop {
+ status = "okay";
+ snoop-ports = <0x80>, <0x81>;
+};
+
+&lpc_ctrl {
+ status = "okay";
+};
+
+&pwm_tacho {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default
+ &pinctrl_pwm1_default
+ &pinctrl_pwm2_default
+ &pinctrl_pwm3_default
+ &pinctrl_pwm4_default
+ &pinctrl_pwm5_default
+ &pinctrl_pwm6_default
+ &pinctrl_pwm7_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan@1 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan@2 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan@3 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+ };
+
+ fan@4 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+ };
+
+ fan@5 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+ };
+
+ fan@6 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06>;
+ };
+
+ fan@7 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x07>;
+ };
+
+ fan@8 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08>;
+ };
+
+ fan@9 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan@10 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
+ };
+
+ fan@11 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
+ };
+
+ fan@12 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan@13 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
+ };
+
+ fan@14 {
+ reg = <0x07>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
+ };
+
+ fan@15 {
+ reg = <0x07>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
+ };
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
index 6406a0f080ee..90feac5ec628 100644
--- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
@@ -5,6 +5,7 @@
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "AMD EthanolX BMC";
@@ -58,6 +59,7 @@ &fmc {
flash@0 {
status = "okay";
m25p,fast-read;
+ label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
@@ -78,7 +80,9 @@ &uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
- &pinctrl_rxd1_default>;
+ &pinctrl_rxd1_default
+ &pinctrl_nrts1_default
+ &pinctrl_ncts1_default>;
};
&uart5 {
@@ -160,7 +164,7 @@ &i2c2 {
&i2c3 {
status = "okay";
eeprom@50 {
- compatible = "atmel,24c256";
+ compatible = "atmel,24c128";
reg = <0x50>;
pagesize = <64>;
};
@@ -261,6 +265,12 @@ &lpc_ctrl {
status = "okay";
};
+&vuart {
+ status = "okay";
+ aspeed,lpc-io-reg = <0x3f8>;
+ aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+};
+
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-09-20 15:35 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-26 20:00 [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC Konstantin Aladyshev
2021-10-26 20:00 ` Konstantin Aladyshev
2021-10-26 20:00 ` Konstantin Aladyshev
2021-10-26 21:03 ` Joel Stanley
2021-10-26 21:03 ` Joel Stanley
2021-10-26 21:03 ` Joel Stanley
2021-10-27 11:05 ` Konstantin Aladyshev
2021-10-27 11:05 ` Konstantin Aladyshev
2021-10-27 11:05 ` Konstantin Aladyshev
2021-11-16 6:07 ` Joel Stanley
2021-11-16 6:07 ` Joel Stanley
2022-09-20 15:34 Konstantin Aladyshev
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