From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-by2nam01on0113.outbound.protection.outlook.com ([104.47.34.113]:17312 "EHLO NAM01-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932882AbeDIAiB (ORCPT ); Sun, 8 Apr 2018 20:38:01 -0400 From: Sasha Levin To: "stable@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Paul Cercueil , Ralf Baechle , Maarten ter Huurne , "linux-mips@linux-mips.org" , James Hogan , Sasha Levin Subject: [PATCH AUTOSEL for 4.4 118/162] clk: ingenic: Fix recalc_rate for clocks with fixed divider Date: Mon, 9 Apr 2018 00:29:16 +0000 Message-ID: <20180409002738.163941-118-alexander.levin@microsoft.com> References: <20180409002738.163941-1-alexander.levin@microsoft.com> In-Reply-To: <20180409002738.163941-1-alexander.levin@microsoft.com> Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org List-ID: From: Paul Cercueil [ Upstream commit e6cfa64375d34a6c8c1861868a381013b2d3b921 ] Previously, the clocks with a fixed divider would report their rate as being the same as the one of their parent, independently of the divider in use. This commit fixes this behaviour. This went unnoticed as neither the jz4740 nor the jz4780 CGU code have clocks with fixed dividers yet. Signed-off-by: Paul Cercueil Acked-by: Stephen Boyd Cc: Ralf Baechle Cc: Maarten ter Huurne Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18477/ Signed-off-by: James Hogan Signed-off-by: Sasha Levin --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index 7cfb7b2a2ed6..e5b1bf4dadcc 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -327,6 +327,8 @@ ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned lon= g parent_rate) div +=3D 1; =20 rate /=3D div; + } else if (clk_info->type & CGU_CLK_FIXDIV) { + rate /=3D clk_info->fixdiv.div; } =20 return rate; --=20 2.15.1