From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78BF3C282DD for ; Wed, 22 May 2019 19:41:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4C1C220675 for ; Wed, 22 May 2019 19:41:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1558554066; bh=wq8EJPOPKziaYiEPgTwLEWSXWJS5+zpOe0LkYK2Rmgg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=jYxJ4Ea+tuh1Slx7kST4u7lo9TZIjiUyVh/km7h9tgnXoprLrSYlbxAxfM13vhWaE XGb15d8qNUYNde3DTkRIQG5e9jlDJSH864puC3yS8EAlyS6d79VAJN9CvnWoHu9WPl 8NY7pAyq7j+dZO1SpDsQNJF1+kynRps+bKeAWlZ0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732433AbfEVT3N (ORCPT ); Wed, 22 May 2019 15:29:13 -0400 Received: from mail.kernel.org ([198.145.29.99]:52060 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732760AbfEVT3J (ORCPT ); Wed, 22 May 2019 15:29:09 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 136FF21841; Wed, 22 May 2019 19:29:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1558553348; bh=wq8EJPOPKziaYiEPgTwLEWSXWJS5+zpOe0LkYK2Rmgg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=etk/5uwd3wMuAEprfEZAy6O134djDy45Hent3tJ52/Bs8Gy9/nI/rD0Flq07h1qAu 9K2lE7s00x0JqtkubY7F8DwuBzf5m0j+vyHLBlnTf8Ej8AZyvaaHJKmOnViscZqx1E WsoI0gxQEq6wLv/NWKvMXmlsTZYpw6FOfEIN6RmI= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Flavio Suligoi , Jarkko Nikula , Mark Brown , Sasha Levin , linux-spi@vger.kernel.org Subject: [PATCH AUTOSEL 4.14 017/167] spi: pxa2xx: fix SCR (divisor) calculation Date: Wed, 22 May 2019 15:26:12 -0400 Message-Id: <20190522192842.25858-17-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190522192842.25858-1-sashal@kernel.org> References: <20190522192842.25858-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Flavio Suligoi [ Upstream commit 29f2133717c527f492933b0622a4aafe0b3cbe9e ] Calculate the divisor for the SCR (Serial Clock Rate), avoiding that the SSP transmission rate can be greater than the device rate. When the division between the SSP clock and the device rate generates a reminder, we have to increment by one the divisor. In this way the resulting SSP clock will never be greater than the device SPI max frequency. For example, with: - ssp_clk = 50 MHz - dev freq = 15 MHz without this patch the SSP clock will be greater than 15 MHz: - 25 MHz for PXA25x_SSP and CE4100_SSP - 16,56 MHz for the others Instead, with this patch, we have in both case an SSP clock of 12.5MHz, so the max rate of the SPI device clock is respected. Signed-off-by: Flavio Suligoi Reviewed-by: Jarkko Nikula Reviewed-by: Jarkko Nikula Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-pxa2xx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index c0e915d8da5d2..efdae686a7619 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -938,10 +938,14 @@ static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate) rate = min_t(int, ssp_clk, rate); + /* + * Calculate the divisor for the SCR (Serial Clock Rate), avoiding + * that the SSP transmission rate can be greater than the device rate + */ if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP) - return (ssp_clk / (2 * rate) - 1) & 0xff; + return (DIV_ROUND_UP(ssp_clk, 2 * rate) - 1) & 0xff; else - return (ssp_clk / rate - 1) & 0xfff; + return (DIV_ROUND_UP(ssp_clk, rate) - 1) & 0xfff; } static unsigned int pxa2xx_ssp_get_clk_div(struct driver_data *drv_data, -- 2.20.1