From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5501BC32750 for ; Fri, 2 Aug 2019 13:34:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2AFBC20665 for ; Fri, 2 Aug 2019 13:34:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1564752861; bh=kB/EHnCtM5RHBwgQD4btkvJ7/dMQShbnB1Utl0t6m1c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=EhmtKf/fxviTAq8uBedEOtNdAmuzPBP6SjhcO+bLw1ik29+vraHUKC5NgTIrNbNUe EDF6n3pVPGuuCjOj8IdPoqG/vJ8wXgXsTB9mJ3N5UxNbS4fSuW8qODBrvdNQ5xMFA7 npWQONlNnFXDNTP9NpZ0tam1y//kamG8pBdaN54A= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389830AbfHBNeQ (ORCPT ); Fri, 2 Aug 2019 09:34:16 -0400 Received: from mail.kernel.org ([198.145.29.99]:33164 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393839AbfHBNWp (ORCPT ); Fri, 2 Aug 2019 09:22:45 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0F4F421850; Fri, 2 Aug 2019 13:22:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1564752165; bh=kB/EHnCtM5RHBwgQD4btkvJ7/dMQShbnB1Utl0t6m1c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GKdExN4wtMJtQPwaDmeDM4rWuIA6mfcBj1VrogrTsc7Mhry4hmYJk+IZxo7xvCALd edwl96BnnPhri+UWi/rLrQfULYWFta9wgFgk5MBZZcZ1I0hYIDzZQY5sle2xidT3we po6yhyuaIbp1Ga2xD9mRGAzXsyv/1/Me7JfKrfXw= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Kan Liang , Andi Kleen , Peter Zijlstra , Linus Torvalds , Thomas Gleixner , Ingo Molnar , Sasha Levin Subject: [PATCH AUTOSEL 5.2 71/76] perf/x86/intel: Fix SLOTS PEBS event constraint Date: Fri, 2 Aug 2019 09:19:45 -0400 Message-Id: <20190802131951.11600-71-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190802131951.11600-1-sashal@kernel.org> References: <20190802131951.11600-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Kan Liang [ Upstream commit 3d0c3953601d250175c7684ec0d9df612061dae5 ] Sampling SLOTS event and ref-cycles event in a group on Icelake gives EINVAL. SLOTS event is the event stands for the fixed counter 3, not fixed counter 2. Wrong mask was set to SLOTS event in intel_icl_pebs_event_constraints[]. Reported-by: Andi Kleen Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support") Link: https://lkml.kernel.org/r/20190723200429.8180-1-kan.liang@linux.intel.com Signed-off-by: Ingo Molnar Signed-off-by: Sasha Levin --- arch/x86/events/intel/ds.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 505c73dc6a730..6601b8759c92f 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -851,7 +851,7 @@ struct event_constraint intel_skl_pebs_event_constraints[] = { struct event_constraint intel_icl_pebs_event_constraints[] = { INTEL_FLAGS_UEVENT_CONSTRAINT(0x1c0, 0x100000000ULL), /* INST_RETIRED.PREC_DIST */ - INTEL_FLAGS_UEVENT_CONSTRAINT(0x0400, 0x400000000ULL), /* SLOTS */ + INTEL_FLAGS_UEVENT_CONSTRAINT(0x0400, 0x800000000ULL), /* SLOTS */ INTEL_PLD_CONSTRAINT(0x1cd, 0xff), /* MEM_TRANS_RETIRED.LOAD_LATENCY */ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(0x1d0, 0xf), /* MEM_INST_RETIRED.LOAD */ -- 2.20.1