From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AD86FC6196 for ; Fri, 8 Nov 2019 12:09:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CDA7A2085B for ; Fri, 8 Nov 2019 12:09:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573214995; bh=kxpznDMExbY+NIj9/CH/dtzZrDEOQHhlfV8VAdGz+C4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ah5XF/MC/c+pqaI9rDiN2uUaxoZjF/0CVhBeiKoL7iDC4LkfJLXTEONuF+Cx3Ij1A SG0h2LV/RxBZ4ouIBCDsh96frHLVM4+BNE/H0hWy2O/LC98PX1ZosZE+ZxIKF1qSMZ qmTQ7KcBSZRfrxfWJqmKzqEP5x4gNDVl4cq4Gfu0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390497AbfKHMJy (ORCPT ); Fri, 8 Nov 2019 07:09:54 -0500 Received: from mail.kernel.org ([198.145.29.99]:52662 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388041AbfKHLjt (ORCPT ); Fri, 8 Nov 2019 06:39:49 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4E3E5222C4; Fri, 8 Nov 2019 11:39:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573213188; bh=kxpznDMExbY+NIj9/CH/dtzZrDEOQHhlfV8VAdGz+C4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m2tQBUebA1Q2+/HYXzlfJoNaGMlSxpEi7po7k9O+JE5PejkWP9QrXqiUCPcQfMhWt HadUF2gmWFJJPJT69YcZV3tg6JskiPlEdZm0w12xbrpMFNAIb9f6IguYI5aDrtpLHN LgXsbYguTY8gtGpobZDDG4wpXrql+hwIzeq5WanQ= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Martin Blumenstingl , Neil Armstrong , Kevin Hilman , Sasha Levin , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org Subject: [PATCH AUTOSEL 4.19 078/205] ARM: dts: meson8: fix the clock controller register size Date: Fri, 8 Nov 2019 06:35:45 -0500 Message-Id: <20191108113752.12502-78-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108113752.12502-1-sashal@kernel.org> References: <20191108113752.12502-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Martin Blumenstingl [ Upstream commit f7f9da89bc4f61e33f7b9f5c75c4efdc1f0455d8 ] The clock controller registers are not 0x460 wide because the reset controller starts at CBUS 0x4404. This currently overlaps with the clock controller (which is at CBUS 0x4000). There is no public documentation available on the actual size of the clock controller's register area (also called "HHI"). However, in Amlogic's GPL kernel sources the last "HHI" register is HHI_HDMI_PHY_CNTL2 at CBUS + 0x43a8. 0x400 was chosen because that size doesn't seem unlikely. Fixes: 2c323c43a3d619 ("ARM: dts: meson8: add and use the real clock controller") Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman Signed-off-by: Sasha Levin --- arch/arm/boot/dts/meson8.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index d77dcf890cfc8..7162e0ca05b0a 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -194,7 +194,7 @@ #clock-cells = <1>; #reset-cells = <1>; compatible = "amlogic,meson8-clkc"; - reg = <0x8000 0x4>, <0x4000 0x460>; + reg = <0x8000 0x4>, <0x4000 0x400>; }; reset: reset-controller@4404 { -- 2.20.1