From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90CD5C33CB1 for ; Tue, 14 Jan 2020 10:20:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6560524676 for ; Tue, 14 Jan 2020 10:20:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1578997200; bh=nkghoqy5PO1R0vFhiLup2ZoVuVgw26sLl6ZOwSh8jKw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=UacvCpJSU/6nxwAigFU3BrUpycgWyi+sZR66uAVtCpUAq86X0F4SKfMw2fpC23GLA 4qqkY9WDPemgkNiRAPOcRyvNf0EC631lUa6GLPHVcSS0WI7nwsjOWCAotFmS2n101I N9AskBbCMUwiebSFGI4lq5UK4+9+K8ztiCQyGegk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729224AbgANKT7 (ORCPT ); Tue, 14 Jan 2020 05:19:59 -0500 Received: from mail.kernel.org ([198.145.29.99]:60574 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729930AbgANKEo (ORCPT ); Tue, 14 Jan 2020 05:04:44 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 731632465B; Tue, 14 Jan 2020 10:04:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1578996284; bh=nkghoqy5PO1R0vFhiLup2ZoVuVgw26sLl6ZOwSh8jKw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fuf4EhHfoWPDvIblSxtsrvXswuagIGkL416fh0FSWY/csCMnirhGsLe+J8FlLxcJG FBjc16X4aiOJeHEVdRrMTWihoy0iUJqPBvEM+i8j/L+Fuxj5TmKjLDWl7nSQAlRH9c UV7xiE5JKhADEziTwbKRF0uYd5HHm/+w0Hh4nF34= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, stable@kernel.vger.org, Lucas De Marchi , Matt Atwood , Radhakrishna Sripada , Matt Roper , Joonas Lahtinen Subject: [PATCH 5.4 23/78] drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl Date: Tue, 14 Jan 2020 11:00:57 +0100 Message-Id: <20200114094356.857631672@linuxfoundation.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200114094352.428808181@linuxfoundation.org> References: <20200114094352.428808181@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Matt Roper commit a7f3ad37f80d0d5eec9dad156964c0dac800a80e upstream. Workaround database indicates we should disable clock gating of both the vsunit and hsunit. Bspec: 33450 Bspec: 33451 Cc: stable@kernel.vger.org Cc: Lucas De Marchi Cc: Matt Atwood Cc: Radhakrishna Sripada Signed-off-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20191224012026.3157766-3-matthew.d.roper@intel.com Reviewed-by: Lucas De Marchi (cherry picked from commit b9cf9dac3dac4c1d2a47d34f30ec53c0423cecf8) Signed-off-by: Joonas Lahtinen Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/i915/i915_reg.h | 4 +++- drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4049,7 +4049,9 @@ enum { #define GWUNIT_CLKGATE_DIS (1 << 16) #define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434) -#define VFUNIT_CLKGATE_DIS (1 << 20) +#define VFUNIT_CLKGATE_DIS REG_BIT(20) +#define HSUNIT_CLKGATE_DIS REG_BIT(8) +#define VSUNIT_CLKGATE_DIS REG_BIT(3) #define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560) #define CGPSF_CLKGATE_DIS (1 << 3) --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -9194,6 +9194,14 @@ static void icl_init_clock_gating(struct /* WaEnable32PlaneMode:icl */ I915_WRITE(GEN9_CSFE_CHICKEN1_RCS, _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE)); + + /* + * Wa_1408615072:icl,ehl (vsunit) + * Wa_1407596294:icl,ehl (hsunit) + */ + intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE, + 0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS); + } static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)