From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF77DC55178 for ; Tue, 3 Nov 2020 21:05:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A3E6621534 for ; Tue, 3 Nov 2020 21:05:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604437503; bh=T9mhykYyDpuupiNvHJ9Z4437cyY0TUXF+Gyuyiv4tMc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=qIxDO0uql0lBDTsEyM+T7vvFkOqgsFW5NVSSU9yzFAJJPCImGeubNLdypasY9bOH6 DjJlDK/C3V4JbCwy/HYvesUe+O+0qfWVcJm3wp87Q1lg7n8yViqzIioie+pRwcZvKb JkJrqyeWx8GORaXyC9xvXh0KwY9oRkrj6sDElTD8= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733126AbgKCVFC (ORCPT ); Tue, 3 Nov 2020 16:05:02 -0500 Received: from mail.kernel.org ([198.145.29.99]:40292 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732706AbgKCVDA (ORCPT ); Tue, 3 Nov 2020 16:03:00 -0500 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 08CEA20658; Tue, 3 Nov 2020 21:02:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604437379; bh=T9mhykYyDpuupiNvHJ9Z4437cyY0TUXF+Gyuyiv4tMc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mxfFDxyLzuYQPPUDA33EwILWeoypo6ukr93cjMVcj+xuxKmS1PoU0Fl8lmL3pC9Lj uMqCxM/iW+/nKpvmImbJ2x330Pny768hAgCjkHV5r5pUtz/GLralYZuLLpUIJAGPc8 u9y5Teg6UsVYM8Tb5Ld8SE+VpZT7JkdgmvRXFk9Q= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Suzuki K Poulose , Marc Zyngier , Will Deacon Subject: [PATCH 4.19 003/191] arm64: Run ARCH_WORKAROUND_1 enabling code on all CPUs Date: Tue, 3 Nov 2020 21:34:55 +0100 Message-Id: <20201103203233.088740109@linuxfoundation.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201103203232.656475008@linuxfoundation.org> References: <20201103203232.656475008@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Marc Zyngier commit 18fce56134c987e5b4eceddafdbe4b00c07e2ae1 upstream. Commit 73f381660959 ("arm64: Advertise mitigation of Spectre-v2, or lack thereof") changed the way we deal with ARCH_WORKAROUND_1, by moving most of the enabling code to the .matches() callback. This has the unfortunate effect that the workaround gets only enabled on the first affected CPU, and no other. In order to address this, forcefully call the .matches() callback from a .cpu_enable() callback, which brings us back to the original behaviour. Fixes: 73f381660959 ("arm64: Advertise mitigation of Spectre-v2, or lack thereof") Cc: Reviewed-by: Suzuki K Poulose Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/cpu_errata.c | 8 ++++++++ 1 file changed, 8 insertions(+) --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -619,6 +619,12 @@ check_branch_predictor(const struct arm6 return (need_wa > 0); } +static void +cpu_enable_branch_predictor_hardening(const struct arm64_cpu_capabilities *cap) +{ + cap->matches(cap, SCOPE_LOCAL_CPU); +} + static const __maybe_unused struct midr_range tx2_family_cpus[] = { MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), @@ -813,9 +819,11 @@ const struct arm64_cpu_capabilities arm6 }, #endif { + .desc = "Branch predictor hardening", .capability = ARM64_HARDEN_BRANCH_PREDICTOR, .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, .matches = check_branch_predictor, + .cpu_enable = cpu_enable_branch_predictor_hardening, }, #ifdef CONFIG_HARDEN_EL2_VECTORS {