From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DD51C41535 for ; Thu, 9 Sep 2021 12:09:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7AC2F61222 for ; Thu, 9 Sep 2021 12:09:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245640AbhIIMKe (ORCPT ); Thu, 9 Sep 2021 08:10:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:48408 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345390AbhIIMHJ (ORCPT ); Thu, 9 Sep 2021 08:07:09 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1187961251; Thu, 9 Sep 2021 11:47:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1631188062; bh=BC1id6oXWvZMPrpyj11WmHqKPYMzm18yCG9E8im3fjc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OdHgB0DG6Z2L7mdEJnnMEA3gbXc0U8SwJPSu0YnUWQavVFe4ECtvCKFXzaUGxDAhO mfoCnKqio7dpRTyGqc7SYYiybbk8Onq3f9K8OYRGUNsddhbRnqkcqiQLa+WjBS/lK6 GTVw3LVq92+7VbbCfTPVrcfk5lIr7S3z5A+da34GeQGkn+hgBMfVUnrdbZY6WnSDsa Ch3p1ETYulUxsOgHXtBy64suI2zdCrWsARjMUEzWTO9mo1ZylhLz9p3z1voBZ556Ju 6DRrnzQc317b275Qqk9CMfXPPbavv7GpRbkQQ7TtBn21vWBDEVEWdbuVroefSzXY9p KZVf6vzSqYHpg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Robin Gong , Lucas Stach , Mark Brown , Shawn Guo , Sasha Levin , linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.13 051/219] spi: imx: remove ERR009165 workaround on i.mx6ul Date: Thu, 9 Sep 2021 07:43:47 -0400 Message-Id: <20210909114635.143983-51-sashal@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210909114635.143983-1-sashal@kernel.org> References: <20210909114635.143983-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Robin Gong [ Upstream commit 8eb1252bbedfb0e800bbbd3e9055a7db0ae2cac9 ] ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and i.mx8m/8mm still need this errata. Please refer to nxp official errata document from https://www.nxp.com/ . For removing workaround on those chips. Add new i.mx6ul type. Signed-off-by: Robin Gong Reviewed-by: Lucas Stach Acked-by: Mark Brown Signed-off-by: Shawn Guo Signed-off-by: Sasha Levin --- drivers/spi/spi-imx.c | 39 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index ac86b3d1052d..113afee6a3c8 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -77,6 +77,11 @@ struct spi_imx_devtype_data { bool has_slavemode; unsigned int fifo_size; bool dynamic_burst; + /* + * ERR009165 fixed or not: + * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf + */ + bool tx_glitch_fixed; enum spi_imx_devtype devtype; }; @@ -622,8 +627,14 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk); spi_imx->spi_bus_clk = clk; - /* ERR009165: work in XHC mode as PIO */ - ctrl &= ~MX51_ECSPI_CTRL_SMC; + /* + * ERR009165: work in XHC mode instead of SMC as PIO on the chips + * before i.mx6ul. + */ + if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) + ctrl |= MX51_ECSPI_CTRL_SMC; + else + ctrl &= ~MX51_ECSPI_CTRL_SMC; writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); @@ -632,12 +643,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, static void mx51_setup_wml(struct spi_imx_data *spi_imx) { + u32 tx_wml = 0; + + if (spi_imx->devtype_data->tx_glitch_fixed) + tx_wml = spi_imx->wml; /* * Configure the DMA register: setup the watermark * and enable DMA request. */ writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | - MX51_ECSPI_DMA_TX_WML(0) | + MX51_ECSPI_DMA_TX_WML(tx_wml) | MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN | MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA); @@ -1028,6 +1043,23 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = { .devtype = IMX53_ECSPI, }; +static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = { + .intctrl = mx51_ecspi_intctrl, + .prepare_message = mx51_ecspi_prepare_message, + .prepare_transfer = mx51_ecspi_prepare_transfer, + .trigger = mx51_ecspi_trigger, + .rx_available = mx51_ecspi_rx_available, + .reset = mx51_ecspi_reset, + .setup_wml = mx51_setup_wml, + .fifo_size = 64, + .has_dmamode = true, + .dynamic_burst = true, + .has_slavemode = true, + .tx_glitch_fixed = true, + .disable = mx51_ecspi_disable, + .devtype = IMX51_ECSPI, +}; + static const struct of_device_id spi_imx_dt_ids[] = { { .compatible = "fsl,imx1-cspi", .data = &imx1_cspi_devtype_data, }, { .compatible = "fsl,imx21-cspi", .data = &imx21_cspi_devtype_data, }, @@ -1036,6 +1068,7 @@ static const struct of_device_id spi_imx_dt_ids[] = { { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, }, { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, }, { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, }, + { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, spi_imx_dt_ids); -- 2.30.2