From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCA43C433EF for ; Tue, 9 Nov 2021 22:32:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A8C1861107 for ; Tue, 9 Nov 2021 22:32:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344356AbhKIWe4 (ORCPT ); Tue, 9 Nov 2021 17:34:56 -0500 Received: from mail.kernel.org ([198.145.29.99]:56152 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344496AbhKIWc2 (ORCPT ); Tue, 9 Nov 2021 17:32:28 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id D4FC061A8F; Tue, 9 Nov 2021 22:21:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1636496485; bh=BASkfKiN81Xw0MCkALqkrx6T1unH/EybtvaN0zJudAs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q8ykJsyIC3g76lzMR5a0UaLqzLXdSbg2zugvUEVNMKBhv+mnlLm8Oz1G+wwXfpj36 fqDwqjEftCJYtTO57QW0TpkbZ0TtrIPLxMJsc/EztbeU0CIq9FtXCxQl8zWWOPVAQl x9zjAQaI0kXTnJ8C0jPODI9niVV+Bjw0G+eo6SkqIUJ2H/8FKQOpZ4d9v26FM80e2B ZpdDoO2z85iPrOtbGOpuUUn6q51aYY6AqjrxsFjPzOQ/7Ty+Xk434MvY19pCAetecR tRBZoPofKJ6KJEi6I6kMlT5hQkUv723QdgrRBVNdS1Sb0Qi7C4aDXeGHnh63rPDb3G Zarkuv3w/t55Q== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Brian Norris , Leo Yan , Chen-Yu Tsai , Douglas Anderson , Heiko Stuebner , Sasha Levin , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, catalin.marinas@arm.com, will.deacon@arm.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH AUTOSEL 5.10 11/50] arm64: dts: rockchip: add Coresight debug range for RK3399 Date: Tue, 9 Nov 2021 17:20:24 -0500 Message-Id: <20211109222103.1234885-11-sashal@kernel.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211109222103.1234885-1-sashal@kernel.org> References: <20211109222103.1234885-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Brian Norris [ Upstream commit 75dccea503b8e176ad044175e891d7bb291b6ba0 ] Per Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt. This IP block can be used for sampling the PC of any given CPU, which is useful in certain panic scenarios where you can't get the CPU to stop cleanly (e.g., hard lockup). Reviewed-by: Leo Yan Reviewed-by: Chen-Yu Tsai Reviewed-by: Douglas Anderson Signed-off-by: Brian Norris Link: https://lore.kernel.org/r/20210908111337.v2.3.Ibc87b4785709543c998cc852c1edaeb7a08edf5c@changeid Signed-off-by: Heiko Stuebner Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48 ++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 4b6065dbba55e..f145c1471dd45 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -393,6 +393,54 @@ status = "disabled"; }; + debug@fe430000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0 0xfe430000 0 0x1000>; + clocks = <&cru PCLK_COREDBG_L>; + clock-names = "apb_pclk"; + cpu = <&cpu_l0>; + }; + + debug@fe432000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0 0xfe432000 0 0x1000>; + clocks = <&cru PCLK_COREDBG_L>; + clock-names = "apb_pclk"; + cpu = <&cpu_l1>; + }; + + debug@fe434000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0 0xfe434000 0 0x1000>; + clocks = <&cru PCLK_COREDBG_L>; + clock-names = "apb_pclk"; + cpu = <&cpu_l2>; + }; + + debug@fe436000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0 0xfe436000 0 0x1000>; + clocks = <&cru PCLK_COREDBG_L>; + clock-names = "apb_pclk"; + cpu = <&cpu_l3>; + }; + + debug@fe610000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0 0xfe610000 0 0x1000>; + clocks = <&cru PCLK_COREDBG_B>; + clock-names = "apb_pclk"; + cpu = <&cpu_b0>; + }; + + debug@fe710000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0 0xfe710000 0 0x1000>; + clocks = <&cru PCLK_COREDBG_B>; + clock-names = "apb_pclk"; + cpu = <&cpu_b1>; + }; + usbdrd3_0: usb@fe800000 { compatible = "rockchip,rk3399-dwc3"; #address-cells = <2>; -- 2.33.0