From: James Morse <james.morse@arm.com>
To: stable@vger.kernel.org
Cc: catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org,
james.morse@arm.com
Subject: [stable:PATCH v5.4.184 14/22] arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations
Date: Tue, 15 Mar 2022 18:24:07 +0000 [thread overview]
Message-ID: <20220315182415.3900464-15-james.morse@arm.com> (raw)
In-Reply-To: <20220315182415.3900464-1-james.morse@arm.com>
commit aff65393fa1401e034656e349abd655cfe272de0 upstream.
kpti is an optional feature, for systems not using kpti a set of
vectors for the spectre-bhb mitigations is needed.
Add another set of vectors, __bp_harden_el1_vectors, that will be
used if a mitigation is needed and kpti is not in use.
The EL1 ventries are repeated verbatim as there is no additional
work needed for entry from EL1.
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
---
arch/arm64/kernel/entry.S | 35 ++++++++++++++++++++++++++++++++++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index c1cebaf68e0c..1bc33f506bb1 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -1066,10 +1066,11 @@ alternative_else_nop_endif
.macro tramp_ventry, vector_start, regsize, kpti
.align 7
1:
- .if \kpti == 1
.if \regsize == 64
msr tpidrro_el0, x30 // Restored in kernel_ventry
.endif
+
+ .if \kpti == 1
/*
* Defend against branch aliasing attacks by pushing a dummy
* entry onto the return stack and using a RET instruction to
@@ -1156,6 +1157,38 @@ __entry_tramp_data_start:
#endif /* CONFIG_RANDOMIZE_BASE */
#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
+/*
+ * Exception vectors for spectre mitigations on entry from EL1 when
+ * kpti is not in use.
+ */
+ .macro generate_el1_vector
+.Lvector_start\@:
+ kernel_ventry 1, sync_invalid // Synchronous EL1t
+ kernel_ventry 1, irq_invalid // IRQ EL1t
+ kernel_ventry 1, fiq_invalid // FIQ EL1t
+ kernel_ventry 1, error_invalid // Error EL1t
+
+ kernel_ventry 1, sync // Synchronous EL1h
+ kernel_ventry 1, irq // IRQ EL1h
+ kernel_ventry 1, fiq_invalid // FIQ EL1h
+ kernel_ventry 1, error // Error EL1h
+
+ .rept 4
+ tramp_ventry .Lvector_start\@, 64, kpti=0
+ .endr
+ .rept 4
+ tramp_ventry .Lvector_start\@, 32, kpti=0
+ .endr
+ .endm
+
+ .pushsection ".entry.text", "ax"
+ .align 11
+SYM_CODE_START(__bp_harden_el1_vectors)
+ generate_el1_vector
+SYM_CODE_END(__bp_harden_el1_vectors)
+ .popsection
+
+
/*
* Register switch for AArch64. The callee-saved registers need to be saved
* and restored. On entry:
--
2.30.2
next prev parent reply other threads:[~2022-03-15 18:24 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-15 18:23 [stable:PATCH v5.4.184 00/22] arm64: Mitigate spectre style branch history side channels James Morse
2022-03-15 18:23 ` [stable:PATCH v5.4.184 01/22] arm64: Add part number for Arm Cortex-A77 James Morse
2022-03-15 18:23 ` [stable:PATCH v5.4.184 02/22] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition James Morse
2022-03-15 18:23 ` [stable:PATCH v5.4.184 03/22] arm64: add ID_AA64ISAR2_EL1 sys register James Morse
2022-03-15 18:23 ` [stable:PATCH v5.4.184 04/22] arm64: Add Cortex-X2 CPU part definition James Morse
2022-03-15 18:23 ` [stable:PATCH v5.4.184 05/22] arm64: entry.S: Add ventry overflow sanity checks James Morse
2022-03-15 18:23 ` [stable:PATCH v5.4.184 06/22] arm64: entry: Make the trampoline cleanup optional James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 07/22] arm64: entry: Free up another register on kpti's tramp_exit path James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 08/22] arm64: entry: Move the trampoline data page before the text page James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 09/22] arm64: entry: Allow tramp_alias to access symbols after the 4K boundary James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 10/22] arm64: entry: Don't assume tramp_vectors is the start of the vectors James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 11/22] arm64: entry: Move trampoline macros out of ifdef'd section James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 12/22] arm64: entry: Make the kpti trampoline's kpti sequence optional James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 13/22] arm64: entry: Allow the trampoline text to occupy multiple pages James Morse
2022-03-15 18:24 ` James Morse [this message]
2022-03-15 18:24 ` [stable:PATCH v5.4.184 15/22] arm64: entry: Add vectors that have the bhb mitigation sequences James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 16/22] arm64: entry: Add macro for reading symbol addresses from the trampoline James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 17/22] arm64: Add percpu vectors for EL1 James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 18/22] arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 19/22] KVM: arm64: Add templates for BHB mitigation sequences James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 20/22] arm64: Mitigate spectre style branch history side channels James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 21/22] KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated James Morse
2022-03-15 18:24 ` [stable:PATCH v5.4.184 22/22] arm64: Use the clearbhb instruction in mitigations James Morse
2022-03-16 15:41 ` [stable:PATCH v5.4.184 00/22] arm64: Mitigate spectre style branch history side channels Sasha Levin
2022-03-16 17:38 ` James Morse
2022-03-16 18:43 ` Sasha Levin
2022-03-17 10:00 ` Greg KH
2022-03-18 12:15 ` James Morse
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220315182415.3900464-15-james.morse@arm.com \
--to=james.morse@arm.com \
--cc=catalin.marinas@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=stable@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).