From: James Morse <james.morse@arm.com>
To: stable@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, james.morse@arm.com,
catalin.marinas@arm.com
Subject: [stable:PATCH v4.19.235 06/22] arm64: entry: Free up another register on kpti's tramp_exit path
Date: Fri, 18 Mar 2022 17:48:26 +0000 [thread overview]
Message-ID: <20220318174842.2321061-7-james.morse@arm.com> (raw)
In-Reply-To: <20220318174842.2321061-1-james.morse@arm.com>
commit 03aff3a77a58b5b52a77e00537a42090ad57b80b upstream.
Kpti stashes x30 in far_el1 while it uses x30 for all its work.
Making the vectors a per-cpu data structure will require a second
register.
Allow tramp_exit two registers before it unmaps the kernel, by
leaving x30 on the stack, and stashing x29 in far_el1.
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
---
arch/arm64/kernel/entry.S | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 96a0dda176c5..16988a9d1d19 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -348,18 +348,20 @@ alternative_else_nop_endif
ldp x24, x25, [sp, #16 * 12]
ldp x26, x27, [sp, #16 * 13]
ldp x28, x29, [sp, #16 * 14]
- ldr lr, [sp, #S_LR]
- add sp, sp, #S_FRAME_SIZE // restore sp
/*
* ARCH_HAS_MEMBARRIER_SYNC_CORE rely on eret context synchronization
* when returning from IPI handler, and when returning to user-space.
*/
.if \el == 0
-alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
+alternative_if_not ARM64_UNMAP_KERNEL_AT_EL0
+ ldr lr, [sp, #S_LR]
+ add sp, sp, #S_FRAME_SIZE // restore sp
+ eret
+alternative_else_nop_endif
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
bne 4f
- msr far_el1, x30
+ msr far_el1, x29
tramp_alias x30, tramp_exit_native
br x30
4:
@@ -367,6 +369,8 @@ alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
br x30
#endif
.else
+ ldr lr, [sp, #S_LR]
+ add sp, sp, #S_FRAME_SIZE // restore sp
eret
.endif
.endm
@@ -996,10 +1000,12 @@ alternative_insn isb, nop, ARM64_WORKAROUND_QCOM_FALKOR_E1003
.macro tramp_exit, regsize = 64
adr x30, tramp_vectors
msr vbar_el1, x30
- tramp_unmap_kernel x30
+ ldr lr, [sp, #S_LR]
+ tramp_unmap_kernel x29
.if \regsize == 64
- mrs x30, far_el1
+ mrs x29, far_el1
.endif
+ add sp, sp, #S_FRAME_SIZE // restore sp
eret
.endm
--
2.30.2
next prev parent reply other threads:[~2022-03-18 17:49 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-18 17:48 [stable:PATCH v4.19.235 00/22] arm64: Mitigate spectre style branch history side channels James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 01/22] arm64: Add part number for Arm Cortex-A77 James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 02/22] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 03/22] arm64: Add Cortex-X2 " James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 04/22] arm64: entry.S: Add ventry overflow sanity checks James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 05/22] arm64: entry: Make the trampoline cleanup optional James Morse
2022-03-18 17:48 ` James Morse [this message]
2022-03-18 17:48 ` [stable:PATCH v4.19.235 07/22] arm64: entry: Move the trampoline data page before the text page James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 08/22] arm64: entry: Allow tramp_alias to access symbols after the 4K boundary James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 09/22] arm64: entry: Don't assume tramp_vectors is the start of the vectors James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 10/22] arm64: entry: Move trampoline macros out of ifdef'd section James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 11/22] arm64: entry: Make the kpti trampoline's kpti sequence optional James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 12/22] arm64: entry: Allow the trampoline text to occupy multiple pages James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 13/22] arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 14/22] arm64: entry: Add vectors that have the bhb mitigation sequences James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 15/22] arm64: entry: Add macro for reading symbol addresses from the trampoline James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 16/22] arm64: Add percpu vectors for EL1 James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 17/22] arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 18/22] KVM: arm64: Add templates for BHB mitigation sequences James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 19/22] arm64: Mitigate spectre style branch history side channels James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 20/22] KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 21/22] arm64: add ID_AA64ISAR2_EL1 sys register James Morse
2022-03-18 17:48 ` [stable:PATCH v4.19.235 22/22] arm64: Use the clearbhb instruction in mitigations James Morse
2022-03-19 12:52 ` [stable:PATCH v4.19.235 00/22] arm64: Mitigate spectre style branch history side channels Greg KH
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220318174842.2321061-7-james.morse@arm.com \
--to=james.morse@arm.com \
--cc=catalin.marinas@arm.com \
--cc=linux-kernel@vger.kernel.org \
--cc=stable@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).