From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99849C4321E for ; Mon, 14 Nov 2022 12:52:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237450AbiKNMwV (ORCPT ); Mon, 14 Nov 2022 07:52:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237496AbiKNMwH (ORCPT ); Mon, 14 Nov 2022 07:52:07 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB06C25286 for ; Mon, 14 Nov 2022 04:52:04 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 672D6B80EB8 for ; Mon, 14 Nov 2022 12:52:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E9C1C433D6; Mon, 14 Nov 2022 12:52:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1668430322; bh=JefIjyUUQ70g1biq7p4wlGoEnw0GOndArBCe2PMycLw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=irNXzRzX1GAhrywHKYrIFA6Bsr8pkHX7wN9aCXkZcv2Ji/t1KvSQRme0lTgHh0hfF YAbn95uQNJD0W9iKyZ3pgpXx1PZVF9/Na3S8JCbLrFBn6m4Hj5ftmgrveLm6cfnKze fBGA7W91/nn7t90M6/bcRV5EtIr9PmILAHFmVkJE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Peter Rosin , Tudor Ambarus , Nicolas Ferre , Vinod Koul Subject: [PATCH 5.10 91/95] dmaengine: at_hdmac: Dont allow CPU to reorder channel enable Date: Mon, 14 Nov 2022 13:46:25 +0100 Message-Id: <20221114124446.285217545@linuxfoundation.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221114124442.530286937@linuxfoundation.org> References: <20221114124442.530286937@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Tudor Ambarus commit 580ee84405c27d6ed419abe4d2b3de1968abdafd upstream. at_hdmac uses __raw_writel for register writes. In the absence of a barrier, the CPU may reorder the register operations. Introduce a write memory barrier so that the CPU does not reorder the channel enable, thus the start of the transfer, without making sure that all the pre-required register fields are already written. Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller") Reported-by: Peter Rosin Signed-off-by: Tudor Ambarus Cc: stable@vger.kernel.org Link: https://lore.kernel.org/lkml/13c6c9a2-6db5-c3bf-349b-4c127ad3496a@axentia.se/ Acked-by: Nicolas Ferre Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com Link: https://lore.kernel.org/r/20221025090306.297886-14-tudor.ambarus@microchip.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman --- drivers/dma/at_hdmac.c | 2 ++ 1 file changed, 2 insertions(+) --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -237,6 +237,8 @@ static void atc_dostart(struct at_dma_ch ATC_SPIP_BOUNDARY(first->boundary)); channel_writel(atchan, DPIP, ATC_DPIP_HOLE(first->dst_hole) | ATC_DPIP_BOUNDARY(first->boundary)); + /* Don't allow CPU to reorder channel enable. */ + wmb(); dma_writel(atdma, CHER, atchan->mask); vdbg_dump_regs(atchan);