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From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Srujana Challa <schalla@marvell.com>,
	"David S . Miller" <davem@davemloft.net>,
	Sasha Levin <sashal@kernel.org>,
	sgoutham@marvell.com, lcherian@marvell.com, gakula@marvell.com,
	jerinj@marvell.com, hkelam@marvell.com, sbhatta@marvell.com,
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
	netdev@vger.kernel.org
Subject: [PATCH AUTOSEL 6.1 29/35] octeontx2-af: modify FLR sequence for CPT
Date: Tue, 24 Jan 2023 08:41:25 -0500	[thread overview]
Message-ID: <20230124134131.637036-29-sashal@kernel.org> (raw)
In-Reply-To: <20230124134131.637036-1-sashal@kernel.org>

From: Srujana Challa <schalla@marvell.com>

[ Upstream commit 1286c50ae9e0f5025b165c8f2321b3ce3b558002 ]

On OcteonTX2 platform CPT instruction enqueue is only
possible via LMTST operations.
The existing FLR sequence mentioned in HRM requires
a dummy LMTST to CPT but LMTST can't be submitted from
AF driver. So, HW team provided a new sequence to avoid
dummy LMTST. This patch adds code for the same.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 .../net/ethernet/marvell/octeontx2/af/rvu.h   | 12 +++
 .../ethernet/marvell/octeontx2/af/rvu_cpt.c   | 86 +++++++++----------
 .../ethernet/marvell/octeontx2/af/rvu_reg.h   |  2 +
 3 files changed, 53 insertions(+), 47 deletions(-)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 76474385a602..a981463939ac 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -453,6 +453,7 @@ struct rvu {
 	struct rvu_pfvf		*pf;
 	struct rvu_pfvf		*hwvf;
 	struct mutex		rsrc_lock; /* Serialize resource alloc/free */
+	struct mutex		alias_lock; /* Serialize bar2 alias access */
 	int			vfs; /* Number of VFs attached to RVU */
 	int			nix_blkaddr[MAX_NIX_BLKS];
 
@@ -540,6 +541,17 @@ static inline u64 rvupf_read64(struct rvu *rvu, u64 offset)
 	return readq(rvu->pfreg_base + offset);
 }
 
+static inline void rvu_bar2_sel_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
+{
+	/* HW requires read back of RVU_AF_BAR2_SEL register to make sure completion of
+	 * write operation.
+	 */
+	rvu_write64(rvu, block, offset, val);
+	rvu_read64(rvu, block, offset);
+	/* Barrier to ensure read completes before accessing LF registers */
+	mb();
+}
+
 /* Silicon revisions */
 static inline bool is_rvu_pre_96xx_C0(struct rvu *rvu)
 {
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
index 1cd34914cb86..e8973294c4f8 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
@@ -930,68 +930,63 @@ static void cpt_rxc_teardown(struct rvu *rvu, int blkaddr)
 		dev_warn(rvu->dev, "Poll for RXC zombie count hits hard loop counter\n");
 }
 
-#define INPROG_INFLIGHT(reg)    ((reg) & 0x1FF)
-#define INPROG_GRB_PARTIAL(reg) ((reg) & BIT_ULL(31))
-#define INPROG_GRB(reg)         (((reg) >> 32) & 0xFF)
-#define INPROG_GWB(reg)         (((reg) >> 40) & 0xFF)
+#define INFLIGHT   GENMASK_ULL(8, 0)
+#define GRB_CNT    GENMASK_ULL(39, 32)
+#define GWB_CNT    GENMASK_ULL(47, 40)
+#define XQ_XOR     GENMASK_ULL(63, 63)
+#define DQPTR      GENMASK_ULL(19, 0)
+#define NQPTR      GENMASK_ULL(51, 32)
 
 static void cpt_lf_disable_iqueue(struct rvu *rvu, int blkaddr, int slot)
 {
-	int i = 0, hard_lp_ctr = 100000;
-	u64 inprog, grp_ptr;
-	u16 nq_ptr, dq_ptr;
+	int timeout = 1000000;
+	u64 inprog, inst_ptr;
+	u64 qsize, pending;
+	int i = 0;
 
 	/* Disable instructions enqueuing */
 	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_CTL), 0x0);
 
-	/* Disable executions in the LF's queue */
 	inprog = rvu_read64(rvu, blkaddr,
 			    CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG));
-	inprog &= ~BIT_ULL(16);
+	inprog |= BIT_ULL(16);
 	rvu_write64(rvu, blkaddr,
 		    CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG), inprog);
 
-	/* Wait for CPT queue to become execution-quiescent */
+	qsize = rvu_read64(rvu, blkaddr,
+			   CPT_AF_BAR2_ALIASX(slot, CPT_LF_Q_SIZE)) & 0x7FFF;
 	do {
-		inprog = rvu_read64(rvu, blkaddr,
-				    CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG));
-		if (INPROG_GRB_PARTIAL(inprog)) {
-			i = 0;
-			hard_lp_ctr--;
-		} else {
-			i++;
-		}
-
-		grp_ptr = rvu_read64(rvu, blkaddr,
-				     CPT_AF_BAR2_ALIASX(slot,
-							CPT_LF_Q_GRP_PTR));
-		nq_ptr = (grp_ptr >> 32) & 0x7FFF;
-		dq_ptr = grp_ptr & 0x7FFF;
-
-	} while (hard_lp_ctr && (i < 10) && (nq_ptr != dq_ptr));
+		inst_ptr = rvu_read64(rvu, blkaddr,
+				      CPT_AF_BAR2_ALIASX(slot, CPT_LF_Q_INST_PTR));
+		pending = (FIELD_GET(XQ_XOR, inst_ptr) * qsize * 40) +
+			  FIELD_GET(NQPTR, inst_ptr) -
+			  FIELD_GET(DQPTR, inst_ptr);
+		udelay(1);
+		timeout--;
+	} while ((pending != 0) && (timeout != 0));
 
-	if (hard_lp_ctr == 0)
-		dev_warn(rvu->dev, "CPT FLR hits hard loop counter\n");
+	if (timeout == 0)
+		dev_warn(rvu->dev, "TIMEOUT: CPT poll on pending instructions\n");
 
-	i = 0;
-	hard_lp_ctr = 100000;
+	timeout = 1000000;
+	/* Wait for CPT queue to become execution-quiescent */
 	do {
 		inprog = rvu_read64(rvu, blkaddr,
 				    CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG));
 
-		if ((INPROG_INFLIGHT(inprog) == 0) &&
-		    (INPROG_GWB(inprog) < 40) &&
-		    ((INPROG_GRB(inprog) == 0) ||
-		     (INPROG_GRB((inprog)) == 40))) {
+		if ((FIELD_GET(INFLIGHT, inprog) == 0) &&
+		    (FIELD_GET(GRB_CNT, inprog) == 0)) {
 			i++;
 		} else {
 			i = 0;
-			hard_lp_ctr--;
+			timeout--;
 		}
-	} while (hard_lp_ctr && (i < 10));
+	} while ((timeout != 0) && (i < 10));
 
-	if (hard_lp_ctr == 0)
-		dev_warn(rvu->dev, "CPT FLR hits hard loop counter\n");
+	if (timeout == 0)
+		dev_warn(rvu->dev, "TIMEOUT: CPT poll on inflight count\n");
+	/* Wait for 2 us to flush all queue writes to memory */
+	udelay(2);
 }
 
 int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf, int slot)
@@ -1001,18 +996,15 @@ int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf, int s
 	if (is_cpt_pf(rvu, pcifunc) || is_cpt_vf(rvu, pcifunc))
 		cpt_rxc_teardown(rvu, blkaddr);
 
+	mutex_lock(&rvu->alias_lock);
 	/* Enable BAR2 ALIAS for this pcifunc. */
 	reg = BIT_ULL(16) | pcifunc;
-	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);
+	rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);
 
 	cpt_lf_disable_iqueue(rvu, blkaddr, slot);
 
-	/* Set group drop to help clear out hardware */
-	reg = rvu_read64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG));
-	reg |= BIT_ULL(17);
-	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG), reg);
-
-	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);
+	rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);
+	mutex_unlock(&rvu->alias_lock);
 
 	return 0;
 }
@@ -1147,7 +1139,7 @@ int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc)
 
 	/* Enable BAR2 ALIAS for this pcifunc. */
 	reg = BIT_ULL(16) | pcifunc;
-	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);
+	rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);
 
 	for (i = 0; i < max_ctx_entries; i++) {
 		cam_data = rvu_read64(rvu, blkaddr, CPT_AF_CTX_CAM_DATA(i));
@@ -1160,7 +1152,7 @@ int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc)
 				    reg);
 		}
 	}
-	rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);
+	rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);
 
 unlock:
 	mutex_unlock(&rvu->rsrc_lock);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
index 0e0d536645ac..5437bd20c719 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
@@ -545,6 +545,8 @@
 
 #define CPT_LF_CTL                      0x10
 #define CPT_LF_INPROG                   0x40
+#define CPT_LF_Q_SIZE                   0x100
+#define CPT_LF_Q_INST_PTR               0x110
 #define CPT_LF_Q_GRP_PTR                0x120
 #define CPT_LF_CTX_FLUSH                0x510
 
-- 
2.39.0


  parent reply	other threads:[~2023-01-24 13:43 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-24 13:40 [PATCH AUTOSEL 6.1 01/35] ARM: dts: imx: Fix pca9547 i2c-mux node name Sasha Levin
2023-01-24 13:40 ` [PATCH AUTOSEL 6.1 02/35] ARM: dts: vf610: Fix pca9548 i2c-mux node names Sasha Levin
2023-01-24 13:40 ` [PATCH AUTOSEL 6.1 03/35] arm64: dts: freescale: Fix pca954x " Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 04/35] arm64: dts: imx8mq-thor96: fix no-mmc property for SDHCI Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 05/35] firmware: arm_scmi: Clear stale xfer->hdr.status Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 06/35] bpf: Skip task with pid=1 in send_signal_common() Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 07/35] erofs/zmap.c: Fix incorrect offset calculation Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 08/35] mac80211: Fix MLO address translation for multiple bss case Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 09/35] arm64: dts: msm8994-angler: fix the memory map Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 10/35] ARM: omap1: fix building gpio15xx Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 11/35] init/Kconfig: fix LOCALVERSION_AUTO help text Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 12/35] kselftest: Fix error message for unconfigured LLVM builds Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 13/35] erofs: clean up parsing of fscache related options Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 14/35] btrfs: factor out scratching of one regular super block Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 15/35] btrfs: stop using write_one_page in btrfs_scratch_superblock Sasha Levin
2023-01-24 16:57   ` David Sterba
2023-02-01 15:21     ` Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 16/35] blk-cgroup: fix missing pd_online_fn() while activating policy Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 17/35] LoongArch: Get frame info in unwind_start() when regs is not available Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 18/35] ACPI: video: Add backlight=native DMI quirk for Acer Aspire 4810T Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 19/35] block: fix hctx checks for batch allocation Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 20/35] s390: workaround invalid gcc-11 out of bounds read warning Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 21/35] HID: uclogic: Add support for XP-PEN Deco 01 V2 Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 22/35] HID: playstation: sanity check DualSense calibration data Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 23/35] dmaengine: imx-sdma: Fix a possible memory leak in sdma_transfer_init Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 24/35] gpiolib: acpi: Allow ignoring wake capability on pins that aren't in _AEI Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 25/35] cifs: fix return of uninitialized rc in dfs_cache_update_tgthint() Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 26/35] nvme-apple: only reset the controller when RTKit is running Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 27/35] octeontx2-af: recover CPT engine when it gets fault Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 28/35] octeontx2-af: add mbox for CPT LF reset Sasha Levin
2023-01-24 13:41 ` Sasha Levin [this message]
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 30/35] octeontx2-af: optimize cpt pf identification Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 31/35] octeontx2-af: restore rxc conf after teardown sequence Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 32/35] octeontx2-af: update cpt lf alloc mailbox Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 33/35] octeontx2-af: add mbox to return CPT_AF_FLT_INT info Sasha Levin
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 34/35] prlimit: do_prlimit needs to have a speculation check Sasha Levin
2023-01-24 15:28   ` Greg Kroah-Hartman
2023-01-24 13:41 ` [PATCH AUTOSEL 6.1 35/35] ext4: deal with legacy signed xattr name hash values Sasha Levin
2023-01-24 16:50   ` Linus Torvalds
2023-01-24 17:23     ` Linus Torvalds
2023-01-25 16:01       ` Theodore Ts'o
2023-01-26 14:12         ` Sasha Levin

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