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From: <>
Cc: <>
Subject: FAILED: patch "[PATCH] x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs" failed to apply to 4.14-stable tree
Date: Sun, 15 Oct 2023 20:17:28 +0200	[thread overview]
Message-ID: <2023101528-jawed-shelving-071a@gregkh> (raw)

The patch below does not apply to the 4.14-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch linux-4.14.y
git checkout FETCH_HEAD
git cherry-pick -x f454b18e07f518bcd0c05af17a2239138bff52de
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<>' --in-reply-to '2023101528-jawed-shelving-071a@gregkh' --subject-prefix 'PATCH 4.14.y' HEAD^..

Possible dependencies:

f454b18e07f5 ("x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs")
77245f1c3c64 ("x86/CPU/AMD: Do not leak quotient data after a division by 0")
138bcddb86d8 ("Merge tag 'x86_bugs_srso' of git://")


greg k-h

------------------ original commit in Linus's tree ------------------

From f454b18e07f518bcd0c05af17a2239138bff52de Mon Sep 17 00:00:00 2001
From: "Borislav Petkov (AMD)" <>
Date: Sat, 7 Oct 2023 12:57:02 +0200
Subject: [PATCH] x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Fix erratum #1485 on Zen4 parts where running with STIBP disabled can
cause an #UD exception. The performance impact of the fix is negligible.

Reported-by: René Rebe <>
Signed-off-by: Borislav Petkov (AMD) <>
Tested-by: René Rebe <>
Cc: <>

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 1d111350197f..b37abb55e948 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -637,12 +637,17 @@
 /* AMD Last Branch Record MSRs */
 #define MSR_AMD64_LBR_SELECT			0xc000010e
-/* Fam 17h MSRs */
-#define MSR_F17H_IRPERF			0xc00000e9
+/* Zen4 */
+#define MSR_ZEN4_BP_CFG			0xc001102e
+/* Zen 2 */
 #define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
+/* Fam 17h MSRs */
+#define MSR_F17H_IRPERF			0xc00000e9
 /* Fam 16h MSRs */
 #define MSR_F16H_L2I_PERF_CTL		0xc0010230
 #define MSR_F16H_L2I_PERF_CTR		0xc0010231
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 03ef962a6992..ece2b5b7b0fe 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -80,6 +80,10 @@ static const int amd_div0[] =
 	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x00, 0x0, 0x2f, 0xf),
 			   AMD_MODEL_RANGE(0x17, 0x50, 0x0, 0x5f, 0xf));
+static const int amd_erratum_1485[] =
+	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),
+			   AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));
 static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
 	int osvw_id = *erratum++;
@@ -1149,6 +1153,10 @@ static void init_amd(struct cpuinfo_x86 *c)
 		pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");
+	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&
+	     cpu_has_amd_erratum(c, amd_erratum_1485))
 #ifdef CONFIG_X86_32

             reply	other threads:[~2023-10-15 18:17 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-15 18:17 gregkh [this message]
2023-10-16  7:55 ` FAILED: patch "[PATCH] x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs" failed to apply to 4.14-stable tree Borislav Petkov
2023-10-16  8:12   ` Greg KH

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