From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E9EDC2BA83 for ; Thu, 13 Feb 2020 18:32:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4DF1822314 for ; Thu, 13 Feb 2020 18:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727705AbgBMScN (ORCPT ); Thu, 13 Feb 2020 13:32:13 -0500 Received: from mga03.intel.com ([134.134.136.65]:46007 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725781AbgBMScM (ORCPT ); Thu, 13 Feb 2020 13:32:12 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Feb 2020 10:32:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,437,1574150400"; d="scan'208";a="238115397" Received: from ray.jf.intel.com (HELO [10.7.201.139]) ([10.7.201.139]) by orsmga006.jf.intel.com with ESMTP; 13 Feb 2020 10:32:11 -0800 Subject: Re: [v3] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Bay Trail SoC To: Thomas Gleixner , Andy Shevchenko Cc: Hans de Goede , vipul kumar , Daniel Lezcano , linux-kernel@vger.kernel.org, Stable , Srikanth Krishnakar , Cedric Hombourger , x86@kernel.org, Len Brown , Vipul Kumar , Dave Hansen , Linus Torvalds , Greg Kroah-Hartman References: <87iml11ccf.fsf@nanos.tec.linutronix.de> <87ftg5131x.fsf@nanos.tec.linutronix.de> <30d49be8-67ad-6f32-37a8-0cdd26f0852e@redhat.com> <87sgjz434v.fsf@nanos.tec.linutronix.de> <20200129130350.GD32742@smile.fi.intel.com> <0d361322-87aa-af48-492c-e8c4983bb35b@redhat.com> <20200129141444.GE32742@smile.fi.intel.com> <91cdda7a-4194-ebe7-225d-854447b0436e@redhat.com> <87imku2t3w.fsf@nanos.tec.linutronix.de> <20200129155353.GI32742@smile.fi.intel.com> <87a7662d7l.fsf@nanos.tec.linutronix.de> From: Dave Hansen Openpgp: preference=signencrypt Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <87a7662d7l.fsf@nanos.tec.linutronix.de> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On 1/29/20 12:57 PM, Thomas Gleixner wrote: > Just to make it entirely clear. We are wasting days already due to the > fact that Intel, who designs, specifies and most importantly sells these > CPUs is either unable or unwilling to provide accurate information about > the trivial and essential information to support these CPUs: > > 1) The crystal frequency > > 2) The nominator/denominator pair to calculate the TSC frequency > from #1 Circling back... The problem here, as I understand it is that we have some of these tables: static const struct freq_desc freq_desc_byt = { 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } }; Where "83300" means "83.3 MHz". the 83.3 came literally from the SDM. Talking to some of the folks who work on the silicon, they confirmed that when the SDM says "083.3 MHz", it represents an approximation of 2000/24. Intel can go through and explain the values more precisely in the documentation. The big-core tables already have more significant digits, for instance. To me, it also seems like the SDM should probably just explicitly state the actual ratios rather than a decimal approximation. But, in the end, the CPU is just enumerating frequencies that are derived from crystals outside the CPU. The hardware in question here tended to be put on boards which were not using the highest-end components and probably don't have the most accurate crystals. So, while we can add precision to the numbers in the documentation, we're not super confident that it will result in a meaningfully more accurate frequency across a big fleet of systems.