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From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: tkuw584924@gmail.com, linux-mtd@lists.infradead.org
Cc: pratyush@kernel.org, michael@walle.cc, miquel.raynal@bootlin.com,
	richard@nod.at, vigneshr@ti.com, Bacem.Daassi@infineon.com,
	Takahiro Kuwano <Takahiro.Kuwano@infineon.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: spansion: Keep CFR5V[6] as 1 in Octal DTR enable/disable
Date: Fri, 6 Jan 2023 11:47:57 +0200	[thread overview]
Message-ID: <493d9a10-aaf3-70f6-36c3-9a2cf39f0759@linaro.org> (raw)
In-Reply-To: <20230106030601.6530-1-Takahiro.Kuwano@infineon.com>

Hey, Takahiro,

On 06.01.2023 05:06, tkuw584924@gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
> 
> CFR5V[6] is reserved bit and must always be 1.

have you seen some strange behavior?
> 
> Fixes: c3266af101f2 ("mtd: spi-nor: spansion: add support for Cypress Semper flash")
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
> Cc: stable@vger.kernel.org
> ---
>   drivers/mtd/spi-nor/spansion.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> index b621cdfd506f..4e094a432d29 100644
> --- a/drivers/mtd/spi-nor/spansion.c
> +++ b/drivers/mtd/spi-nor/spansion.c
> @@ -21,8 +21,8 @@
>   #define SPINOR_REG_CYPRESS_CFR3V		0x00800004
>   #define SPINOR_REG_CYPRESS_CFR3V_PGSZ		BIT(4) /* Page size. */
>   #define SPINOR_REG_CYPRESS_CFR5V		0x00800006
> -#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN	0x3
> -#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS	0
> +#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN	0x43
> +#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS	0x40

No, this looks bad. Instead of overwriting CFR5V with whatever value, we
should instead first read it and then update only the bit that we're
interested in. If it happens to write CFR5V before octal enable/disable,
you'll overwrite the previous set values.

Cheers,
ta

  reply	other threads:[~2023-01-06  9:49 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-06  3:06 [PATCH] mtd: spi-nor: spansion: Keep CFR5V[6] as 1 in Octal DTR enable/disable tkuw584924
2023-01-06  9:47 ` Tudor Ambarus [this message]
2023-01-06  9:55   ` Tudor Ambarus
2023-01-10  4:39   ` Takahiro Kuwano
2023-01-10 16:47   ` [PATCH 1/2] mtd: spi-nor: spansion: Consider reserved bits in CFR5 register Tudor Ambarus
2023-01-11  6:28     ` Dhruva Gole
2023-01-18  7:34     ` Takahiro Kuwano
2023-01-23 14:37     ` Pratyush Yadav
2023-01-23 16:31       ` Dhruva Gole
2023-01-24 10:43         ` Pratyush Yadav
2023-01-24 11:12           ` Dhruva Gole
2023-01-24 12:03             ` Pratyush Yadav
2023-02-01  7:14         ` Takahiro Kuwano
2023-01-31  9:00     ` Tudor Ambarus

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