- Stephen Boyd

From: Stephen Boyd <swboyd@chromium.org>
To: Sasha Levin <sashal@kernel.org>
Cc: sbhanu@codeaurora.org, stable@vger.kernel.org,
	Adrian Hunter <adrian.hunter@intel.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: 
Date: Thu, 26 Aug 2021 19:02:00 +0000	[thread overview]
Message-ID: <CAE-0n50brNnTASH8xR_jSCr0=OAQohcA4cG3HFAeDmt=4U-4Uw@mail.gmail.com> (raw)
In-Reply-To: <YSfioM5cEnvD3pGb@sashalap>

Quoting Sasha Levin (2021-08-26 11:51:12)
> On Thu, Aug 26, 2021 at 07:51:45AM +0000, Stephen Boyd wrote:
> >From cd5d41c802f7b3e20c0c0ebd6bf0cb335954fd89 Mon Sep 17 00:00:00 2001
> >From: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
> >Date: Fri, 16 Jul 2021 17:16:14 +0530
> >Subject: [PATCH] mmc: sdhci-msm: Update the software timeout value for sdhc
> >
> >commit 67b13f3e221ed81b46a657e2b499bf8b20162476 upstream.
> >
> >Whenever SDHC run at clock rate 50MHZ or below, the hardware data
> >timeout value will be 21.47secs, which is approx. 22secs and we have
> >a current software timeout value as 10secs. We have to set software
> >timeout value more than the hardware data timeout value to avioid seeing
> >the below register dumps.
> >
> >[  332.953670] mmc2: Timeout waiting for hardware interrupt.
> >[  332.959608] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
> >[  332.966450] mmc2: sdhci: Sys addr:  0x00000000 | Version:  0x00007202
> >[  332.973256] mmc2: sdhci: Blk size:  0x00000200 | Blk cnt:  0x00000001
> >[  332.980054] mmc2: sdhci: Argument:  0x00000000 | Trn mode: 0x00000027
> >[  332.986864] mmc2: sdhci: Present:   0x01f801f6 | Host ctl: 0x0000001f
> >[  332.993671] mmc2: sdhci: Power:     0x00000001 | Blk gap:  0x00000000
> >[  333.000583] mmc2: sdhci: Wake-up:   0x00000000 | Clock:    0x00000007
> >[  333.007386] mmc2: sdhci: Timeout:   0x0000000e | Int stat: 0x00000000
> >[  333.014182] mmc2: sdhci: Int enab:  0x03ff100b | Sig enab: 0x03ff100b
> >[  333.020976] mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
> >[  333.027771] mmc2: sdhci: Caps:      0x322dc8b2 | Caps_1:   0x0000808f
> >[  333.034561] mmc2: sdhci: Cmd:       0x0000183a | Max curr: 0x00000000
> >[  333.041359] mmc2: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x00000000
> >[  333.048157] mmc2: sdhci: Resp[2]:   0x00000000 | Resp[3]:  0x00000000
> >[  333.054945] mmc2: sdhci: Host ctl2: 0x00000000
> >[  333.059657] mmc2: sdhci: ADMA Err:  0x00000000 | ADMA Ptr:
> >0x0000000ffffff218
> >[  333.067178] mmc2: sdhci_msm: ----------- VENDOR REGISTER DUMP
> >-----------
> >[  333.074343] mmc2: sdhci_msm: DLL sts: 0x00000000 | DLL cfg:
> >0x6000642c | DLL cfg2: 0x0020a000
> >[  333.083417] mmc2: sdhci_msm: DLL cfg3: 0x00000000 | DLL usr ctl:
> >0x00000000 | DDR cfg: 0x80040873
> >[  333.092850] mmc2: sdhci_msm: Vndr func: 0x00008a9c | Vndr func2 :
> >0xf88218a8 Vndr func3: 0x02626040
> >[  333.102371] mmc2: sdhci: ============================================
> >
> >So, set software timeout value more than hardware timeout value.
> >
> >Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
> >Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> >Cc: stable@vger.kernel.org
> >Link: https://lore.kernel.org/r/1626435974-14462-1-git-send-email-sbhanu@codeaurora.org
> >Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
> >Signed-off-by: Stephen Boyd <swboyd@chromium.org>
> >---
> > drivers/mmc/host/sdhci-msm.c | 18 ++++++++++++++++++
> > 1 file changed, 18 insertions(+)
> >
> >diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> >index 8bed81cf03ad..8ab963055238 100644
> >--- a/drivers/mmc/host/sdhci-msm.c
> >+++ b/drivers/mmc/host/sdhci-msm.c
> >@@ -1589,6 +1589,23 @@ static void sdhci_msm_set_clock(struct
> >sdhci_host *host, unsigned int clock)
>
> I've queued this up, thanks!

Thanks!

>
> Note that the patch was linewrapped (see above).

Indeed. Must be something wrong with my mailer setup. I'll look into
fixing it. Thanks.